1 /* 2 * \file trc_tgt_mem_access_i.h 3 * \brief OpenCSD : Target memory read interface. 4 * 5 * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved. 6 */ 7 8 /* 9 * Redistribution and use in source and binary forms, with or without modification, 10 * are permitted provided that the following conditions are met: 11 * 12 * 1. Redistributions of source code must retain the above copyright notice, 13 * this list of conditions and the following disclaimer. 14 * 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * 3. Neither the name of the copyright holder nor the names of its contributors 20 * may be used to endorse or promote products derived from this software without 21 * specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #ifndef ARM_TRC_TGT_MEM_ACCESS_I_H_INCLUDED 36 #define ARM_TRC_TGT_MEM_ACCESS_I_H_INCLUDED 37 38 /*! 39 * @class ITargetMemAccess 40 * 41 * @brief Interface to target memory access. 42 * 43 * @ingroup ocsd_interfaces 44 * 45 * Read Target memory call is used by the decoder to access the memory location in the 46 * target memory space for the next instruction(s) to be traced. 47 * 48 * Memory data returned is to be little-endian. 49 * 50 * The implementator of this interface could either use file(s) containing dumps of memory 51 * locations from the target, be an elf file reader extracting code, or a live target 52 * connection, depending on the tool execution context. 53 * 54 * 55 */ 56 class ITargetMemAccess 57 { 58 public: ITargetMemAccess()59 ITargetMemAccess() {}; /**< default interface constructor */ ~ITargetMemAccess()60 virtual ~ITargetMemAccess() {}; /**< default interface destructor */ 61 62 /*! 63 * Read a block of target memory into supplied buffer. 64 * 65 * Bytes read set less than bytes required, along with a success return code indicates full memory 66 * location not accessible. Function will return all accessible bytes from the address up to the point 67 * where the first inaccessible location appears. 68 * 69 * The cs_trace_id associates a memory read with a core. Different cores may have different memory spaces, 70 * the memory access may take this into account. Access will first look in the registered memory areas 71 * associated with the ID, failing that will look into any global memory spaces. 72 * 73 * @param address : Address to access. 74 * @param cs_trace_id : protocol source trace ID. 75 * @param mem_space : Memory space to access, (secure, non-secure, optionally with EL, or any). 76 * @param num_bytes : [in] Number of bytes required. [out] Number of bytes actually read. 77 * @param *p_buffer : Buffer to fill with the bytes. 78 * 79 * @return ocsd_err_t : OCSD_OK on successful access (including memory not available) 80 */ 81 virtual ocsd_err_t ReadTargetMemory( const ocsd_vaddr_t address, 82 const uint8_t cs_trace_id, 83 const ocsd_mem_space_acc_t mem_space, 84 uint32_t *num_bytes, 85 uint8_t *p_buffer) = 0; 86 }; 87 88 89 #endif // ARM_TRC_TGT_MEM_ACCESS_I_H_INCLUDED 90 91 /* End of File trc_tgt_mem_access_i.h */ 92