1 // Auto-generated file. Do not edit!
2 // Template: src/f32-dwconv/up-avx512.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/dwconv.h>
15 #include <xnnpack/intrinsics-polyfill.h>
16
17
xnn_f32_dwconv_minmax_ukernel_up32x9__avx512f_acc2(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_dwconv_minmax_ukernel_up32x9__avx512f_acc2(
19 size_t channels,
20 size_t output_width,
21 const float** input,
22 const float* weights,
23 float* output,
24 size_t input_stride,
25 size_t output_increment,
26 size_t input_offset,
27 const float* zero,
28 const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)])
29 {
30 assert(channels != 0);
31 assert(output_width != 0);
32
33 const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
34 const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
35 do {
36 const float* i0 = input[0];
37 assert(i0 != NULL);
38 if XNN_UNPREDICTABLE(i0 != zero) {
39 i0 = (const float*) ((uintptr_t) i0 + input_offset);
40 }
41 const float* i1 = input[1];
42 assert(i1 != NULL);
43 if XNN_UNPREDICTABLE(i1 != zero) {
44 i1 = (const float*) ((uintptr_t) i1 + input_offset);
45 }
46 const float* i2 = input[2];
47 assert(i2 != NULL);
48 if XNN_UNPREDICTABLE(i2 != zero) {
49 i2 = (const float*) ((uintptr_t) i2 + input_offset);
50 }
51 const float* i3 = input[3];
52 assert(i3 != NULL);
53 if XNN_UNPREDICTABLE(i3 != zero) {
54 i3 = (const float*) ((uintptr_t) i3 + input_offset);
55 }
56 const float* i4 = input[4];
57 assert(i4 != NULL);
58 if XNN_UNPREDICTABLE(i4 != zero) {
59 i4 = (const float*) ((uintptr_t) i4 + input_offset);
60 }
61 const float* i5 = input[5];
62 assert(i5 != NULL);
63 if XNN_UNPREDICTABLE(i5 != zero) {
64 i5 = (const float*) ((uintptr_t) i5 + input_offset);
65 }
66 const float* i6 = input[6];
67 assert(i6 != NULL);
68 if XNN_UNPREDICTABLE(i6 != zero) {
69 i6 = (const float*) ((uintptr_t) i6 + input_offset);
70 }
71 const float* i7 = input[7];
72 assert(i7 != NULL);
73 if XNN_UNPREDICTABLE(i7 != zero) {
74 i7 = (const float*) ((uintptr_t) i7 + input_offset);
75 }
76 const float* i8 = input[8];
77 assert(i8 != NULL);
78 if XNN_UNPREDICTABLE(i8 != zero) {
79 i8 = (const float*) ((uintptr_t) i8 + input_offset);
80 }
81 input = (const float**) ((uintptr_t) input + input_stride);
82
83 size_t c = channels;
84 const float* w = weights;
85 for (; c >= 32; c -= 32) {
86 __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
87 __m512 vaccGHIJKLMNOPQRSTUVp0 = _mm512_load_ps(w + 16);
88
89
90 const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
91 const __m512 vi0xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i0 + 16);
92 i0 += 32;
93
94 const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
95 const __m512 vk0xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 48);
96 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
97 vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi0xGHIJKLMNOPQRSTUV, vk0xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
98
99 const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
100 const __m512 vi1xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i1 + 16);
101 i1 += 32;
102
103 const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
104 const __m512 vk1xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 80);
105 __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
106 __m512 vaccGHIJKLMNOPQRSTUVp1 = _mm512_mul_ps(vi1xGHIJKLMNOPQRSTUV, vk1xGHIJKLMNOPQRSTUV);
107
108 const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
109 const __m512 vi2xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i2 + 16);
110 i2 += 32;
111
112 const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
113 const __m512 vk2xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 112);
114 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
115 vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi2xGHIJKLMNOPQRSTUV, vk2xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
116
117 const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
118 const __m512 vi3xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i3 + 16);
119 i3 += 32;
120
121 const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
122 const __m512 vk3xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 144);
123 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
124 vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi3xGHIJKLMNOPQRSTUV, vk3xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
125
126 const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
127 const __m512 vi4xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i4 + 16);
128 i4 += 32;
129
130 const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
131 const __m512 vk4xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 176);
132 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
133 vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi4xGHIJKLMNOPQRSTUV, vk4xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
134
135 const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
136 const __m512 vi5xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i5 + 16);
137 i5 += 32;
138
139 const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
140 const __m512 vk5xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 208);
141 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
142 vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi5xGHIJKLMNOPQRSTUV, vk5xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
143
144 const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
145 const __m512 vi6xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i6 + 16);
146 i6 += 32;
147
148 const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
149 const __m512 vk6xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 240);
150 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
151 vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi6xGHIJKLMNOPQRSTUV, vk6xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
152
153 const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
154 const __m512 vi7xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i7 + 16);
155 i7 += 32;
156
157 const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
158 const __m512 vk7xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 272);
159 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
160 vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi7xGHIJKLMNOPQRSTUV, vk7xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
161
162 const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
163 const __m512 vi8xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i8 + 16);
164 i8 += 32;
165
166 const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
167 const __m512 vk8xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 304);
168 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
169 vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi8xGHIJKLMNOPQRSTUV, vk8xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
170
171 w += 320;
172
173 // Add up all accumulators to vacc0123456789ABCDEFGHIJKLMNOPQRSTUVp0
174 vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
175 vaccGHIJKLMNOPQRSTUVp0 = _mm512_add_ps(vaccGHIJKLMNOPQRSTUVp0, vaccGHIJKLMNOPQRSTUVp1);
176
177 __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
178 __m512 vaccGHIJKLMNOPQRSTUV = _mm512_max_ps(vaccGHIJKLMNOPQRSTUVp0, vmin);
179 vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
180 vaccGHIJKLMNOPQRSTUV = _mm512_min_ps(vaccGHIJKLMNOPQRSTUV, vmax);
181
182 _mm512_storeu_ps(output, vacc0123456789ABCDEF);
183 _mm512_storeu_ps(output + 16, vaccGHIJKLMNOPQRSTUV);
184 output += 32;
185 }
186 for (; c >= 16; c -= 16) {
187 __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
188
189 const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
190 i0 += 16;
191
192 const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
193 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
194
195 const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
196 i1 += 16;
197
198 const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
199 __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
200
201 const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
202 i2 += 16;
203
204 const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
205 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
206
207 const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
208 i3 += 16;
209
210 const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
211 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
212
213 const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
214 i4 += 16;
215
216 const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
217 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
218
219 const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
220 i5 += 16;
221
222 const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
223 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
224
225 const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
226 i6 += 16;
227
228 const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
229 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
230
231 const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
232 i7 += 16;
233
234 const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
235 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
236
237 const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
238 i8 += 16;
239
240 const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
241 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
242
243 w += 16;
244
245 // Add up all accumulators to vacc0123456789ABCDEFp0
246 vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
247
248 __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
249 vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
250
251 _mm512_storeu_ps(output, vacc0123456789ABCDEF);
252 output += 16;
253 }
254 if XNN_UNLIKELY(c != 0) {
255 assert(c >= 1);
256 assert(c <= 16);
257 // Prepare mask for valid 32-bit elements (depends on nc).
258 const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
259
260 __m512 vacc0123456789ABCDEFp0 = _mm512_maskz_loadu_ps(vmask, w);
261
262 const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
263 const __m512 vk0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 32);
264 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
265
266 const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
267 const __m512 vk1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 64);
268 __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
269
270 const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
271 const __m512 vk2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 96);
272 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
273
274 const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
275 const __m512 vk3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 128);
276 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
277
278 const __m512 vi4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i4);
279 const __m512 vk4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 160);
280 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
281
282 const __m512 vi5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i5);
283 const __m512 vk5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 192);
284 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
285
286 const __m512 vi6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i6);
287 const __m512 vk6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 224);
288 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
289
290 const __m512 vi7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i7);
291 const __m512 vk7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 256);
292 vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
293
294 const __m512 vi8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i8);
295 const __m512 vk8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, w + 288);
296 vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
297
298 // Add up all accumulators to vacc0123456789ABCDEFp0
299 vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
300
301 __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
302 vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
303
304 _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
305 output += c;
306 }
307
308 output = (float*) ((uintptr_t) output + output_increment);
309 } while (--output_width != 0);
310 }
311