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1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-dwconv/up-neon.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/dwconv.h>
15 
16 
xnn_f32_dwconv_minmax_ukernel_up8x9__neon_acc2(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_dwconv_minmax_ukernel_up8x9__neon_acc2(
18     size_t channels,
19     size_t output_width,
20     const float** input,
21     const float* weights,
22     float* output,
23     size_t input_stride,
24     size_t output_increment,
25     size_t input_offset,
26     const float* zero,
27     const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
28 {
29   assert(channels != 0);
30   assert(output_width != 0);
31 
32   const float32x4_t vmax = vld1q_dup_f32(&params->scalar.max);
33   const float32x4_t vmin = vld1q_dup_f32(&params->scalar.min);
34   do {
35     const float* i0 = input[0];
36     assert(i0 != NULL);
37     if XNN_UNPREDICTABLE(i0 != zero) {
38       i0 = (const float*) ((uintptr_t) i0 + input_offset);
39     }
40     const float* i1 = input[1];
41     assert(i1 != NULL);
42     if XNN_UNPREDICTABLE(i1 != zero) {
43       i1 = (const float*) ((uintptr_t) i1 + input_offset);
44     }
45     const float* i2 = input[2];
46     assert(i2 != NULL);
47     if XNN_UNPREDICTABLE(i2 != zero) {
48       i2 = (const float*) ((uintptr_t) i2 + input_offset);
49     }
50     const float* i3 = input[3];
51     assert(i3 != NULL);
52     if XNN_UNPREDICTABLE(i3 != zero) {
53       i3 = (const float*) ((uintptr_t) i3 + input_offset);
54     }
55     const float* i4 = input[4];
56     assert(i4 != NULL);
57     if XNN_UNPREDICTABLE(i4 != zero) {
58       i4 = (const float*) ((uintptr_t) i4 + input_offset);
59     }
60     const float* i5 = input[5];
61     assert(i5 != NULL);
62     if XNN_UNPREDICTABLE(i5 != zero) {
63       i5 = (const float*) ((uintptr_t) i5 + input_offset);
64     }
65     const float* i6 = input[6];
66     assert(i6 != NULL);
67     if XNN_UNPREDICTABLE(i6 != zero) {
68       i6 = (const float*) ((uintptr_t) i6 + input_offset);
69     }
70     const float* i7 = input[7];
71     assert(i7 != NULL);
72     if XNN_UNPREDICTABLE(i7 != zero) {
73       i7 = (const float*) ((uintptr_t) i7 + input_offset);
74     }
75     const float* i8 = input[8];
76     assert(i8 != NULL);
77     if XNN_UNPREDICTABLE(i8 != zero) {
78       i8 = (const float*) ((uintptr_t) i8 + input_offset);
79     }
80 
81     input = (const float**) ((uintptr_t) input + input_stride);
82 
83     size_t c = channels;
84     const float* w = weights;
85     for (; c >= 8; c -= 8) {
86       float32x4_t vacc0123p0 = vld1q_f32(w); w += 4;
87       float32x4_t vacc4567p0 = vld1q_f32(w); w += 4;
88 
89 
90       const float32x4_t vi0x0123 = vld1q_f32(i0); i0 += 4;
91       const float32x4_t vi0x4567 = vld1q_f32(i0); i0 += 4;
92       const float32x4_t vk0x0123 = vld1q_f32(w); w += 4;
93       const float32x4_t vk0x4567 = vld1q_f32(w); w += 4;
94       vacc0123p0 = vmlaq_f32(vacc0123p0, vi0x0123, vk0x0123);
95       vacc4567p0 = vmlaq_f32(vacc4567p0, vi0x4567, vk0x4567);
96 
97       const float32x4_t vi1x0123 = vld1q_f32(i1); i1 += 4;
98       const float32x4_t vi1x4567 = vld1q_f32(i1); i1 += 4;
99       const float32x4_t vk1x0123 = vld1q_f32(w); w += 4;
100       const float32x4_t vk1x4567 = vld1q_f32(w); w += 4;
101       float32x4_t vacc0123p1 = vmulq_f32(vi1x0123, vk1x0123);
102       float32x4_t vacc4567p1 = vmulq_f32(vi1x4567, vk1x4567);
103 
104       const float32x4_t vi2x0123 = vld1q_f32(i2); i2 += 4;
105       const float32x4_t vi2x4567 = vld1q_f32(i2); i2 += 4;
106       const float32x4_t vk2x0123 = vld1q_f32(w); w += 4;
107       const float32x4_t vk2x4567 = vld1q_f32(w); w += 4;
108       vacc0123p0 = vmlaq_f32(vacc0123p0, vi2x0123, vk2x0123);
109       vacc4567p0 = vmlaq_f32(vacc4567p0, vi2x4567, vk2x4567);
110 
111       const float32x4_t vi3x0123 = vld1q_f32(i3); i3 += 4;
112       const float32x4_t vi3x4567 = vld1q_f32(i3); i3 += 4;
113       const float32x4_t vk3x0123 = vld1q_f32(w); w += 4;
114       const float32x4_t vk3x4567 = vld1q_f32(w); w += 4;
115       vacc0123p1 = vmlaq_f32(vacc0123p1, vi3x0123, vk3x0123);
116       vacc4567p1 = vmlaq_f32(vacc4567p1, vi3x4567, vk3x4567);
117 
118       const float32x4_t vi4x0123 = vld1q_f32(i4); i4 += 4;
119       const float32x4_t vi4x4567 = vld1q_f32(i4); i4 += 4;
120       const float32x4_t vk4x0123 = vld1q_f32(w); w += 4;
121       const float32x4_t vk4x4567 = vld1q_f32(w); w += 4;
122       vacc0123p0 = vmlaq_f32(vacc0123p0, vi4x0123, vk4x0123);
123       vacc4567p0 = vmlaq_f32(vacc4567p0, vi4x4567, vk4x4567);
124 
125       const float32x4_t vi5x0123 = vld1q_f32(i5); i5 += 4;
126       const float32x4_t vi5x4567 = vld1q_f32(i5); i5 += 4;
127       const float32x4_t vk5x0123 = vld1q_f32(w); w += 4;
128       const float32x4_t vk5x4567 = vld1q_f32(w); w += 4;
129       vacc0123p1 = vmlaq_f32(vacc0123p1, vi5x0123, vk5x0123);
130       vacc4567p1 = vmlaq_f32(vacc4567p1, vi5x4567, vk5x4567);
131 
132       const float32x4_t vi6x0123 = vld1q_f32(i6); i6 += 4;
133       const float32x4_t vi6x4567 = vld1q_f32(i6); i6 += 4;
134       const float32x4_t vk6x0123 = vld1q_f32(w); w += 4;
135       const float32x4_t vk6x4567 = vld1q_f32(w); w += 4;
136       vacc0123p0 = vmlaq_f32(vacc0123p0, vi6x0123, vk6x0123);
137       vacc4567p0 = vmlaq_f32(vacc4567p0, vi6x4567, vk6x4567);
138 
139       const float32x4_t vi7x0123 = vld1q_f32(i7); i7 += 4;
140       const float32x4_t vi7x4567 = vld1q_f32(i7); i7 += 4;
141       const float32x4_t vk7x0123 = vld1q_f32(w); w += 4;
142       const float32x4_t vk7x4567 = vld1q_f32(w); w += 4;
143       vacc0123p1 = vmlaq_f32(vacc0123p1, vi7x0123, vk7x0123);
144       vacc4567p1 = vmlaq_f32(vacc4567p1, vi7x4567, vk7x4567);
145 
146       const float32x4_t vi8x0123 = vld1q_f32(i8); i8 += 4;
147       const float32x4_t vi8x4567 = vld1q_f32(i8); i8 += 4;
148       const float32x4_t vk8x0123 = vld1q_f32(w); w += 4;
149       const float32x4_t vk8x4567 = vld1q_f32(w); w += 4;
150       vacc0123p0 = vmlaq_f32(vacc0123p0, vi8x0123, vk8x0123);
151       vacc4567p0 = vmlaq_f32(vacc4567p0, vi8x4567, vk8x4567);
152 
153       // Add up all accumulators to vacc01234567p0
154       vacc0123p0 = vaddq_f32(vacc0123p0, vacc0123p1);
155       vacc4567p0 = vaddq_f32(vacc4567p0, vacc4567p1);
156 
157       float32x4_t vacc0123 = vmaxq_f32(vacc0123p0, vmin);
158       float32x4_t vacc4567 = vmaxq_f32(vacc4567p0, vmin);
159       vacc0123 = vminq_f32(vacc0123, vmax);
160       vacc4567 = vminq_f32(vacc4567, vmax);
161 
162       vst1q_f32(output, vacc0123); output += 4;
163       vst1q_f32(output, vacc4567); output += 4;
164     }
165     for (; c >= 4; c -= 4) {
166       float32x4_t vacc0123p0 = vld1q_f32(w); w += 4;
167 
168 
169       const float32x4_t vi0x0123 = vld1q_f32(i0); i0 += 4;
170       const float32x4_t vk0x0123 = vld1q_f32(w + 4);
171       vacc0123p0 = vmlaq_f32(vacc0123p0, vi0x0123, vk0x0123);
172 
173       const float32x4_t vi1x0123 = vld1q_f32(i1); i1 += 4;
174       const float32x4_t vk1x0123 = vld1q_f32(w + 12);
175       float32x4_t vacc0123p1 = vmulq_f32(vi1x0123, vk1x0123);
176 
177       const float32x4_t vi2x0123 = vld1q_f32(i2); i2 += 4;
178       const float32x4_t vk2x0123 = vld1q_f32(w + 20);
179       vacc0123p0 = vmlaq_f32(vacc0123p0, vi2x0123, vk2x0123);
180 
181       const float32x4_t vi3x0123 = vld1q_f32(i3); i3 += 4;
182       const float32x4_t vk3x0123 = vld1q_f32(w + 28);
183       vacc0123p1 = vmlaq_f32(vacc0123p1, vi3x0123, vk3x0123);
184 
185       const float32x4_t vi4x0123 = vld1q_f32(i4); i4 += 4;
186       const float32x4_t vk4x0123 = vld1q_f32(w + 36);
187       vacc0123p0 = vmlaq_f32(vacc0123p0, vi4x0123, vk4x0123);
188 
189       const float32x4_t vi5x0123 = vld1q_f32(i5); i5 += 4;
190       const float32x4_t vk5x0123 = vld1q_f32(w + 44);
191       vacc0123p1 = vmlaq_f32(vacc0123p1, vi5x0123, vk5x0123);
192 
193       const float32x4_t vi6x0123 = vld1q_f32(i6); i6 += 4;
194       const float32x4_t vk6x0123 = vld1q_f32(w + 52);
195       vacc0123p0 = vmlaq_f32(vacc0123p0, vi6x0123, vk6x0123);
196 
197       const float32x4_t vi7x0123 = vld1q_f32(i7); i7 += 4;
198       const float32x4_t vk7x0123 = vld1q_f32(w + 60);
199       vacc0123p1 = vmlaq_f32(vacc0123p1, vi7x0123, vk7x0123);
200 
201       const float32x4_t vi8x0123 = vld1q_f32(i8); i8 += 4;
202       const float32x4_t vk8x0123 = vld1q_f32(w + 68);
203       vacc0123p0 = vmlaq_f32(vacc0123p0, vi8x0123, vk8x0123);
204 
205       // Add up all accumulators to vacc0123p0
206       vacc0123p0 = vaddq_f32(vacc0123p0, vacc0123p1);
207 
208       float32x4_t vacc0123 = vmaxq_f32(vacc0123p0, vmin);
209       vacc0123 = vminq_f32(vacc0123, vmax);
210 
211       vst1q_f32(output, vacc0123); output += 4;
212     }
213     if XNN_UNLIKELY(c != 0) {
214       float32x4_t vacc0123p0 = vld1q_f32(w);
215 
216 
217       const float32x4_t vi0x0123 = vld1q_f32(i0);
218       const float32x4_t vk0x0123 = vld1q_f32(w + 8);
219       vacc0123p0 = vmlaq_f32(vacc0123p0, vi0x0123, vk0x0123);
220 
221       const float32x4_t vi1x0123 = vld1q_f32(i1);
222       const float32x4_t vk1x0123 = vld1q_f32(w + 16);
223       float32x4_t vacc0123p1 = vmulq_f32(vi1x0123, vk1x0123);
224 
225       const float32x4_t vi2x0123 = vld1q_f32(i2);
226       const float32x4_t vk2x0123 = vld1q_f32(w + 24);
227       vacc0123p0 = vmlaq_f32(vacc0123p0, vi2x0123, vk2x0123);
228 
229       const float32x4_t vi3x0123 = vld1q_f32(i3);
230       const float32x4_t vk3x0123 = vld1q_f32(w + 32);
231       vacc0123p1 = vmlaq_f32(vacc0123p1, vi3x0123, vk3x0123);
232 
233       const float32x4_t vi4x0123 = vld1q_f32(i4);
234       const float32x4_t vk4x0123 = vld1q_f32(w + 40);
235       vacc0123p0 = vmlaq_f32(vacc0123p0, vi4x0123, vk4x0123);
236 
237       const float32x4_t vi5x0123 = vld1q_f32(i5);
238       const float32x4_t vk5x0123 = vld1q_f32(w + 48);
239       vacc0123p1 = vmlaq_f32(vacc0123p1, vi5x0123, vk5x0123);
240 
241       const float32x4_t vi6x0123 = vld1q_f32(i6);
242       const float32x4_t vk6x0123 = vld1q_f32(w + 56);
243       vacc0123p0 = vmlaq_f32(vacc0123p0, vi6x0123, vk6x0123);
244 
245       const float32x4_t vi7x0123 = vld1q_f32(i7);
246       const float32x4_t vk7x0123 = vld1q_f32(w + 64);
247       vacc0123p1 = vmlaq_f32(vacc0123p1, vi7x0123, vk7x0123);
248 
249       const float32x4_t vi8x0123 = vld1q_f32(i8);
250       const float32x4_t vk8x0123 = vld1q_f32(w + 72);
251       vacc0123p0 = vmlaq_f32(vacc0123p0, vi8x0123, vk8x0123);
252 
253       // Add up all accumulators to vacc0123p0
254       vacc0123p0 = vaddq_f32(vacc0123p0, vacc0123p1);
255 
256       float32x4_t vacc0123 = vmaxq_f32(vacc0123p0, vmin);
257       vacc0123 = vminq_f32(vacc0123, vmax);
258 
259       float32x2_t vacc01 = vget_low_f32(vacc0123);
260       if (c & 2) {
261         vst1_f32(output, vacc01); output += 2;
262         vacc01 = vget_high_f32(vacc0123);
263       }
264       if (c & 1) {
265         vst1_lane_f32(output, vacc01, 0); output += 1;
266       }
267     }
268 
269     output = (float*) ((uintptr_t) output + output_increment);
270   } while (--output_width != 0);
271 }
272