1 // Auto-generated file. Do not edit!
2 // Template: src/f32-prelu/neon.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/math.h>
15 #include <xnnpack/prelu.h>
16
17
xnn_f32_prelu_ukernel__neon_4x4(size_t rows,size_t channels,const float * restrict input,size_t input_stride,const float * restrict weights,float * restrict output,size_t output_stride)18 void xnn_f32_prelu_ukernel__neon_4x4(
19 size_t rows,
20 size_t channels,
21 const float*restrict input,
22 size_t input_stride,
23 const float*restrict weights,
24 float*restrict output,
25 size_t output_stride) XNN_DISABLE_TSAN
26 {
27 assert(rows != 0);
28 assert(channels != 0);
29 assert(channels % sizeof(float) == 0);
30
31 const float* i0 = input;
32 float* o0 = output;
33 const float* i1 = (const float*) ((uintptr_t) i0 + input_stride);
34 float* o1 = (float*) ((uintptr_t) o0 + output_stride);
35 if XNN_UNPREDICTABLE(rows < 2) {
36 i1 = i0;
37 o1 = o0;
38 }
39 const float* i2 = (const float*) ((uintptr_t) i1 + input_stride);
40 float* o2 = (float*) ((uintptr_t) o1 + output_stride);
41 if XNN_UNPREDICTABLE(rows <= 2) {
42 i2 = i1;
43 o2 = o1;
44 }
45 const float* i3 = (const float*) ((uintptr_t) i2 + input_stride);
46 float* o3 = (float*) ((uintptr_t) o2 + output_stride);
47 if XNN_UNPREDICTABLE(rows < 4) {
48 i3 = i2;
49 o3 = o2;
50 }
51
52 const size_t input_increment = input_stride * 4 - channels;
53 const size_t output_increment = output_stride * 4 - channels;
54
55 do {
56 const float* w = weights;
57 size_t c = channels;
58 for (; c >= 4 * sizeof(float); c -= 4 * sizeof(float)) {
59 const float32x4_t vw0123 = vld1q_f32(w); w += 4;
60
61 const float32x4_t vi0x0123 = vld1q_f32(i0); i0 += 4;
62 const float32x4_t vi1x0123 = vld1q_f32(i1); i1 += 4;
63 const float32x4_t vi2x0123 = vld1q_f32(i2); i2 += 4;
64 const float32x4_t vi3x0123 = vld1q_f32(i3); i3 += 4;
65
66 float32x4_t vacc0x0123 = vmulq_f32(vi0x0123, vw0123);
67 const uint32x4_t vm0x0123 = vcltq_s32(vreinterpretq_s32_f32(vi0x0123), vmovq_n_s32(0));
68 float32x4_t vacc1x0123 = vmulq_f32(vi1x0123, vw0123);
69 const uint32x4_t vm1x0123 = vcltq_s32(vreinterpretq_s32_f32(vi1x0123), vmovq_n_s32(0));
70 float32x4_t vacc2x0123 = vmulq_f32(vi2x0123, vw0123);
71 const uint32x4_t vm2x0123 = vcltq_s32(vreinterpretq_s32_f32(vi2x0123), vmovq_n_s32(0));
72 float32x4_t vacc3x0123 = vmulq_f32(vi3x0123, vw0123);
73 const uint32x4_t vm3x0123 = vcltq_s32(vreinterpretq_s32_f32(vi3x0123), vmovq_n_s32(0));
74
75 vacc0x0123 = vbslq_f32(vm0x0123, vacc0x0123, vi0x0123);
76 vacc1x0123 = vbslq_f32(vm1x0123, vacc1x0123, vi1x0123);
77 vacc2x0123 = vbslq_f32(vm2x0123, vacc2x0123, vi2x0123);
78 vacc3x0123 = vbslq_f32(vm3x0123, vacc3x0123, vi3x0123);
79
80 vst1q_f32(o0, vacc0x0123); o0 += 4;
81 vst1q_f32(o1, vacc1x0123); o1 += 4;
82 vst1q_f32(o2, vacc2x0123); o2 += 4;
83 vst1q_f32(o3, vacc3x0123); o3 += 4;
84 }
85 if XNN_UNLIKELY(c != 0) {
86 const float32x4_t vw0123 = vld1q_f32(w); w += 4;
87
88 const float32x4_t vi0x0123 = vld1q_f32(i0);
89 i0 = (const float*) ((uintptr_t) i0 + c);
90 const float32x4_t vi1x0123 = vld1q_f32(i1);
91 i1 = (const float*) ((uintptr_t) i1 + c);
92 const float32x4_t vi2x0123 = vld1q_f32(i2);
93 i2 = (const float*) ((uintptr_t) i2 + c);
94 const float32x4_t vi3x0123 = vld1q_f32(i3);
95 i3 = (const float*) ((uintptr_t) i3 + c);
96
97 float32x4_t vacc0x0123 = vmulq_f32(vi0x0123, vw0123);
98 const uint32x4_t vm0x0123 = vcltq_s32(vreinterpretq_s32_f32(vi0x0123), vmovq_n_s32(0));
99 float32x4_t vacc1x0123 = vmulq_f32(vi1x0123, vw0123);
100 const uint32x4_t vm1x0123 = vcltq_s32(vreinterpretq_s32_f32(vi1x0123), vmovq_n_s32(0));
101 float32x4_t vacc2x0123 = vmulq_f32(vi2x0123, vw0123);
102 const uint32x4_t vm2x0123 = vcltq_s32(vreinterpretq_s32_f32(vi2x0123), vmovq_n_s32(0));
103 float32x4_t vacc3x0123 = vmulq_f32(vi3x0123, vw0123);
104 const uint32x4_t vm3x0123 = vcltq_s32(vreinterpretq_s32_f32(vi3x0123), vmovq_n_s32(0));
105
106 vacc0x0123 = vbslq_f32(vm0x0123, vacc0x0123, vi0x0123);
107 vacc1x0123 = vbslq_f32(vm1x0123, vacc1x0123, vi1x0123);
108 vacc2x0123 = vbslq_f32(vm2x0123, vacc2x0123, vi2x0123);
109 vacc3x0123 = vbslq_f32(vm3x0123, vacc3x0123, vi3x0123);
110
111 float32x2_t vacc0x01 = vget_low_f32(vacc0x0123);
112 float32x2_t vacc1x01 = vget_low_f32(vacc1x0123);
113 float32x2_t vacc2x01 = vget_low_f32(vacc2x0123);
114 float32x2_t vacc3x01 = vget_low_f32(vacc3x0123);
115 if (c & (2 * sizeof(float))) {
116 vst1_f32(o0, vacc0x01); o0 += 2;
117 vst1_f32(o1, vacc1x01); o1 += 2;
118 vst1_f32(o2, vacc2x01); o2 += 2;
119 vst1_f32(o3, vacc3x01); o3 += 2;
120
121 vacc0x01 = vget_high_f32(vacc0x0123);
122 vacc1x01 = vget_high_f32(vacc1x0123);
123 vacc2x01 = vget_high_f32(vacc2x0123);
124 vacc3x01 = vget_high_f32(vacc3x0123);
125 }
126 if (c & (1 * sizeof(float))) {
127 vst1_lane_f32(o0, vacc0x01, 0); o0 += 1;
128 vst1_lane_f32(o1, vacc1x01, 0); o1 += 1;
129 vst1_lane_f32(o2, vacc2x01, 0); o2 += 1;
130 vst1_lane_f32(o3, vacc3x01, 0); o3 += 1;
131 }
132 }
133 i0 = (const float*) ((uintptr_t) i0 + input_increment);
134 o0 = (float*) ((uintptr_t) o0 + output_increment);
135 i1 = (const float*) ((uintptr_t) i1 + input_increment);
136 o1 = (float*) ((uintptr_t) o1 + output_increment);
137 if XNN_UNPREDICTABLE(rows < 6) {
138 i1 = i0;
139 o1 = o0;
140 }
141 i2 = (const float*) ((uintptr_t) i2 + input_increment);
142 o2 = (float*) ((uintptr_t) o2 + output_increment);
143 if XNN_UNPREDICTABLE(rows <= 6) {
144 i2 = i1;
145 o2 = o1;
146 }
147 i3 = (const float*) ((uintptr_t) i3 + input_increment);
148 o3 = (float*) ((uintptr_t) o3 + output_increment);
149 if XNN_UNPREDICTABLE(rows < 8) {
150 i3 = i2;
151 o3 = o2;
152 }
153 rows = doz(rows, 4);
154 } while (rows != 0);
155 }
156