1 // Auto-generated file. Do not edit!
2 // Template: src/f32-prelu/wasmsimd-bitselect.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <wasm_simd128.h>
13
14 #include <xnnpack/math.h>
15 #include <xnnpack/prelu.h>
16
17
xnn_f32_prelu_ukernel__wasmsimd_bitselect_4x16(size_t rows,size_t channels,const float * restrict input,size_t input_stride,const float * restrict weights,float * restrict output,size_t output_stride)18 void xnn_f32_prelu_ukernel__wasmsimd_bitselect_4x16(
19 size_t rows,
20 size_t channels,
21 const float*restrict input,
22 size_t input_stride,
23 const float*restrict weights,
24 float*restrict output,
25 size_t output_stride) XNN_DISABLE_TSAN
26 {
27 assert(rows != 0);
28 assert(channels != 0);
29 assert(channels % sizeof(float) == 0);
30
31 const float* i0 = input;
32 float* o0 = output;
33 const float* i1 = (const float*) ((uintptr_t) i0 + input_stride);
34 float* o1 = (float*) ((uintptr_t) o0 + output_stride);
35 if XNN_UNPREDICTABLE(rows < 2) {
36 i1 = i0;
37 o1 = o0;
38 }
39 const float* i2 = (const float*) ((uintptr_t) i1 + input_stride);
40 float* o2 = (float*) ((uintptr_t) o1 + output_stride);
41 if XNN_UNPREDICTABLE(rows <= 2) {
42 i2 = i1;
43 o2 = o1;
44 }
45 const float* i3 = (const float*) ((uintptr_t) i2 + input_stride);
46 float* o3 = (float*) ((uintptr_t) o2 + output_stride);
47 if XNN_UNPREDICTABLE(rows < 4) {
48 i3 = i2;
49 o3 = o2;
50 }
51
52 const size_t input_increment = input_stride * 4 - channels;
53 const size_t output_increment = output_stride * 4 - channels;
54
55 const v128_t vzero = wasm_i32x4_splat(0);
56 do {
57 const float* w = weights;
58 size_t c = channels;
59 for (; c >= 16 * sizeof(float); c -= 16 * sizeof(float)) {
60 const v128_t vw0123 = wasm_v128_load(w);
61 const v128_t vw4567 = wasm_v128_load(w + 4);
62 const v128_t vw89AB = wasm_v128_load(w + 8);
63 const v128_t vwCDEF = wasm_v128_load(w + 12);
64 w += 16;
65
66 const v128_t vi0x0123 = wasm_v128_load(i0);
67 const v128_t vi0x4567 = wasm_v128_load(i0 + 4);
68 const v128_t vi0x89AB = wasm_v128_load(i0 + 8);
69 const v128_t vi0xCDEF = wasm_v128_load(i0 + 12);
70 i0 += 16;
71 const v128_t vi1x0123 = wasm_v128_load(i1);
72 const v128_t vi1x4567 = wasm_v128_load(i1 + 4);
73 const v128_t vi1x89AB = wasm_v128_load(i1 + 8);
74 const v128_t vi1xCDEF = wasm_v128_load(i1 + 12);
75 i1 += 16;
76 const v128_t vi2x0123 = wasm_v128_load(i2);
77 const v128_t vi2x4567 = wasm_v128_load(i2 + 4);
78 const v128_t vi2x89AB = wasm_v128_load(i2 + 8);
79 const v128_t vi2xCDEF = wasm_v128_load(i2 + 12);
80 i2 += 16;
81 const v128_t vi3x0123 = wasm_v128_load(i3);
82 const v128_t vi3x4567 = wasm_v128_load(i3 + 4);
83 const v128_t vi3x89AB = wasm_v128_load(i3 + 8);
84 const v128_t vi3xCDEF = wasm_v128_load(i3 + 12);
85 i3 += 16;
86
87 v128_t vacc0x0123 = wasm_f32x4_mul(vi0x0123, vw0123);
88 const v128_t vmask0x0123 = wasm_i32x4_lt(vi0x0123, vzero);
89 v128_t vacc0x4567 = wasm_f32x4_mul(vi0x4567, vw4567);
90 const v128_t vmask0x4567 = wasm_i32x4_lt(vi0x4567, vzero);
91 v128_t vacc0x89AB = wasm_f32x4_mul(vi0x89AB, vw89AB);
92 const v128_t vmask0x89AB = wasm_i32x4_lt(vi0x89AB, vzero);
93 v128_t vacc0xCDEF = wasm_f32x4_mul(vi0xCDEF, vwCDEF);
94 const v128_t vmask0xCDEF = wasm_i32x4_lt(vi0xCDEF, vzero);
95 v128_t vacc1x0123 = wasm_f32x4_mul(vi1x0123, vw0123);
96 const v128_t vmask1x0123 = wasm_i32x4_lt(vi1x0123, vzero);
97 v128_t vacc1x4567 = wasm_f32x4_mul(vi1x4567, vw4567);
98 const v128_t vmask1x4567 = wasm_i32x4_lt(vi1x4567, vzero);
99 v128_t vacc1x89AB = wasm_f32x4_mul(vi1x89AB, vw89AB);
100 const v128_t vmask1x89AB = wasm_i32x4_lt(vi1x89AB, vzero);
101 v128_t vacc1xCDEF = wasm_f32x4_mul(vi1xCDEF, vwCDEF);
102 const v128_t vmask1xCDEF = wasm_i32x4_lt(vi1xCDEF, vzero);
103 v128_t vacc2x0123 = wasm_f32x4_mul(vi2x0123, vw0123);
104 const v128_t vmask2x0123 = wasm_i32x4_lt(vi2x0123, vzero);
105 v128_t vacc2x4567 = wasm_f32x4_mul(vi2x4567, vw4567);
106 const v128_t vmask2x4567 = wasm_i32x4_lt(vi2x4567, vzero);
107 v128_t vacc2x89AB = wasm_f32x4_mul(vi2x89AB, vw89AB);
108 const v128_t vmask2x89AB = wasm_i32x4_lt(vi2x89AB, vzero);
109 v128_t vacc2xCDEF = wasm_f32x4_mul(vi2xCDEF, vwCDEF);
110 const v128_t vmask2xCDEF = wasm_i32x4_lt(vi2xCDEF, vzero);
111 v128_t vacc3x0123 = wasm_f32x4_mul(vi3x0123, vw0123);
112 const v128_t vmask3x0123 = wasm_i32x4_lt(vi3x0123, vzero);
113 v128_t vacc3x4567 = wasm_f32x4_mul(vi3x4567, vw4567);
114 const v128_t vmask3x4567 = wasm_i32x4_lt(vi3x4567, vzero);
115 v128_t vacc3x89AB = wasm_f32x4_mul(vi3x89AB, vw89AB);
116 const v128_t vmask3x89AB = wasm_i32x4_lt(vi3x89AB, vzero);
117 v128_t vacc3xCDEF = wasm_f32x4_mul(vi3xCDEF, vwCDEF);
118 const v128_t vmask3xCDEF = wasm_i32x4_lt(vi3xCDEF, vzero);
119
120 vacc0x0123 = wasm_v128_bitselect(vacc0x0123, vi0x0123, vmask0x0123);
121 vacc0x4567 = wasm_v128_bitselect(vacc0x4567, vi0x4567, vmask0x4567);
122 vacc0x89AB = wasm_v128_bitselect(vacc0x89AB, vi0x89AB, vmask0x89AB);
123 vacc0xCDEF = wasm_v128_bitselect(vacc0xCDEF, vi0xCDEF, vmask0xCDEF);
124 vacc1x0123 = wasm_v128_bitselect(vacc1x0123, vi1x0123, vmask1x0123);
125 vacc1x4567 = wasm_v128_bitselect(vacc1x4567, vi1x4567, vmask1x4567);
126 vacc1x89AB = wasm_v128_bitselect(vacc1x89AB, vi1x89AB, vmask1x89AB);
127 vacc1xCDEF = wasm_v128_bitselect(vacc1xCDEF, vi1xCDEF, vmask1xCDEF);
128 vacc2x0123 = wasm_v128_bitselect(vacc2x0123, vi2x0123, vmask2x0123);
129 vacc2x4567 = wasm_v128_bitselect(vacc2x4567, vi2x4567, vmask2x4567);
130 vacc2x89AB = wasm_v128_bitselect(vacc2x89AB, vi2x89AB, vmask2x89AB);
131 vacc2xCDEF = wasm_v128_bitselect(vacc2xCDEF, vi2xCDEF, vmask2xCDEF);
132 vacc3x0123 = wasm_v128_bitselect(vacc3x0123, vi3x0123, vmask3x0123);
133 vacc3x4567 = wasm_v128_bitselect(vacc3x4567, vi3x4567, vmask3x4567);
134 vacc3x89AB = wasm_v128_bitselect(vacc3x89AB, vi3x89AB, vmask3x89AB);
135 vacc3xCDEF = wasm_v128_bitselect(vacc3xCDEF, vi3xCDEF, vmask3xCDEF);
136
137 wasm_v128_store(o0, vacc0x0123);
138 wasm_v128_store(o0 + 4, vacc0x4567);
139 wasm_v128_store(o0 + 8, vacc0x89AB);
140 wasm_v128_store(o0 + 12, vacc0xCDEF);
141 o0 += 16;
142 wasm_v128_store(o1, vacc1x0123);
143 wasm_v128_store(o1 + 4, vacc1x4567);
144 wasm_v128_store(o1 + 8, vacc1x89AB);
145 wasm_v128_store(o1 + 12, vacc1xCDEF);
146 o1 += 16;
147 wasm_v128_store(o2, vacc2x0123);
148 wasm_v128_store(o2 + 4, vacc2x4567);
149 wasm_v128_store(o2 + 8, vacc2x89AB);
150 wasm_v128_store(o2 + 12, vacc2xCDEF);
151 o2 += 16;
152 wasm_v128_store(o3, vacc3x0123);
153 wasm_v128_store(o3 + 4, vacc3x4567);
154 wasm_v128_store(o3 + 8, vacc3x89AB);
155 wasm_v128_store(o3 + 12, vacc3xCDEF);
156 o3 += 16;
157 }
158 for (; c >= 4 * sizeof(float); c -= 4 * sizeof(float)) {
159 const v128_t vw0123 = wasm_v128_load(w);
160 w += 4;
161
162 const v128_t vi0x0123 = wasm_v128_load(i0);
163 i0 += 4;
164 const v128_t vi1x0123 = wasm_v128_load(i1);
165 i1 += 4;
166 const v128_t vi2x0123 = wasm_v128_load(i2);
167 i2 += 4;
168 const v128_t vi3x0123 = wasm_v128_load(i3);
169 i3 += 4;
170
171 v128_t vacc0x0123 = wasm_f32x4_mul(vi0x0123, vw0123);
172 const v128_t vmask0x0123 = wasm_i32x4_lt(vi0x0123, vzero);
173 v128_t vacc1x0123 = wasm_f32x4_mul(vi1x0123, vw0123);
174 const v128_t vmask1x0123 = wasm_i32x4_lt(vi1x0123, vzero);
175 v128_t vacc2x0123 = wasm_f32x4_mul(vi2x0123, vw0123);
176 const v128_t vmask2x0123 = wasm_i32x4_lt(vi2x0123, vzero);
177 v128_t vacc3x0123 = wasm_f32x4_mul(vi3x0123, vw0123);
178 const v128_t vmask3x0123 = wasm_i32x4_lt(vi3x0123, vzero);
179
180 vacc0x0123 = wasm_v128_bitselect(vacc0x0123, vi0x0123, vmask0x0123);
181 vacc1x0123 = wasm_v128_bitselect(vacc1x0123, vi1x0123, vmask1x0123);
182 vacc2x0123 = wasm_v128_bitselect(vacc2x0123, vi2x0123, vmask2x0123);
183 vacc3x0123 = wasm_v128_bitselect(vacc3x0123, vi3x0123, vmask3x0123);
184
185 wasm_v128_store(o0, vacc0x0123);
186 o0 += 4;
187 wasm_v128_store(o1, vacc1x0123);
188 o1 += 4;
189 wasm_v128_store(o2, vacc2x0123);
190 o2 += 4;
191 wasm_v128_store(o3, vacc3x0123);
192 o3 += 4;
193 }
194 if XNN_UNLIKELY(c != 0) {
195 const v128_t vw0123 = wasm_v128_load(w);
196 w = (const float*) ((uintptr_t) w + c);
197
198 const v128_t vi0x0123 = wasm_v128_load(i0);
199 i0 = (const float*) ((uintptr_t) i0 + c);
200 const v128_t vi1x0123 = wasm_v128_load(i1);
201 i1 = (const float*) ((uintptr_t) i1 + c);
202 const v128_t vi2x0123 = wasm_v128_load(i2);
203 i2 = (const float*) ((uintptr_t) i2 + c);
204 const v128_t vi3x0123 = wasm_v128_load(i3);
205 i3 = (const float*) ((uintptr_t) i3 + c);
206
207 v128_t vacc0x0123 = wasm_f32x4_mul(vi0x0123, vw0123);
208 const v128_t vmask0x0123 = wasm_i32x4_lt(vi0x0123, vzero);
209 v128_t vacc1x0123 = wasm_f32x4_mul(vi1x0123, vw0123);
210 const v128_t vmask1x0123 = wasm_i32x4_lt(vi1x0123, vzero);
211 v128_t vacc2x0123 = wasm_f32x4_mul(vi2x0123, vw0123);
212 const v128_t vmask2x0123 = wasm_i32x4_lt(vi2x0123, vzero);
213 v128_t vacc3x0123 = wasm_f32x4_mul(vi3x0123, vw0123);
214 const v128_t vmask3x0123 = wasm_i32x4_lt(vi3x0123, vzero);
215
216 vacc0x0123 = wasm_v128_bitselect(vacc0x0123, vi0x0123, vmask0x0123);
217 vacc1x0123 = wasm_v128_bitselect(vacc1x0123, vi1x0123, vmask1x0123);
218 vacc2x0123 = wasm_v128_bitselect(vacc2x0123, vi2x0123, vmask2x0123);
219 vacc3x0123 = wasm_v128_bitselect(vacc3x0123, vi3x0123, vmask3x0123);
220
221 if (c & (2 * sizeof(float))) {
222 *((double*) o0) = wasm_f64x2_extract_lane(vacc0x0123, 0);
223 *((double*) o1) = wasm_f64x2_extract_lane(vacc1x0123, 0);
224 *((double*) o2) = wasm_f64x2_extract_lane(vacc2x0123, 0);
225 *((double*) o3) = wasm_f64x2_extract_lane(vacc3x0123, 0);
226
227 vacc0x0123 = wasm_v32x4_shuffle(vacc0x0123, vacc0x0123, 2, 3, 2, 3);
228 vacc1x0123 = wasm_v32x4_shuffle(vacc1x0123, vacc1x0123, 2, 3, 2, 3);
229 vacc2x0123 = wasm_v32x4_shuffle(vacc2x0123, vacc2x0123, 2, 3, 2, 3);
230 vacc3x0123 = wasm_v32x4_shuffle(vacc3x0123, vacc3x0123, 2, 3, 2, 3);
231
232 o0 += 2;
233 o1 += 2;
234 o2 += 2;
235 o3 += 2;
236 }
237 if (c & (1 * sizeof(float))) {
238 *o0 = wasm_f32x4_extract_lane(vacc0x0123, 0);
239 *o1 = wasm_f32x4_extract_lane(vacc1x0123, 0);
240 *o2 = wasm_f32x4_extract_lane(vacc2x0123, 0);
241 *o3 = wasm_f32x4_extract_lane(vacc3x0123, 0);
242
243 o0 += 1;
244 o1 += 1;
245 o2 += 1;
246 o3 += 1;
247 }
248 }
249 i0 = (const float*) ((uintptr_t) i0 + input_increment);
250 o0 = (float*) ((uintptr_t) o0 + output_increment);
251 i1 = (const float*) ((uintptr_t) i1 + input_increment);
252 o1 = (float*) ((uintptr_t) o1 + output_increment);
253 if XNN_UNPREDICTABLE(rows < 6) {
254 i1 = i0;
255 o1 = o0;
256 }
257 i2 = (const float*) ((uintptr_t) i2 + input_increment);
258 o2 = (float*) ((uintptr_t) o2 + output_increment);
259 if XNN_UNPREDICTABLE(rows <= 6) {
260 i2 = i1;
261 o2 = o1;
262 }
263 i3 = (const float*) ((uintptr_t) i3 + input_increment);
264 o3 = (float*) ((uintptr_t) o3 + output_increment);
265 if XNN_UNPREDICTABLE(rows < 8) {
266 i3 = i2;
267 o3 = o2;
268 }
269 rows = doz(rows, 4);
270 } while (rows != 0);
271 }
272