1 // Auto-generated file. Do not edit!
2 // Template: src/f32-velu/avx-rr2-p6.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/vunary.h>
16
17
18 static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
19
xnn_f32_velu_ukernel__avx_rr2_p6_x32(size_t n,const float * x,float * y,const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS (1)])20 void xnn_f32_velu_ukernel__avx_rr2_p6_x32(
21 size_t n,
22 const float* x,
23 float* y,
24 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)])
25 {
26 assert(n % sizeof(float) == 0);
27
28 const __m256 vprescale = _mm256_broadcast_ps((const __m128*) params->sse.prescale);
29 const __m256 valpha = _mm256_broadcast_ps((const __m128*) params->sse.alpha);
30 const __m256 vbeta = _mm256_broadcast_ps((const __m128*) params->sse.beta);
31
32 const __m256 vsat_cutoff = _mm256_set1_ps(-0x1.154246p+4f);
33 const __m256 vmagic_bias = _mm256_set1_ps(0x1.8000FEp23f);
34 const __m256 vlog2e = _mm256_set1_ps(0x1.715476p+0f);
35 const __m256 vminus_ln2_hi = _mm256_set1_ps(-0x1.62E440p-1f);
36 const __m256 vminus_ln2_lo = _mm256_set1_ps(0x1.0105C6p-21f);
37 const __m256 vc6 = _mm256_set1_ps(0x1.6b7338p-10f);
38 const __m256 vc5 = _mm256_set1_ps(0x1.12278Ep-7f);
39 const __m256 vc4 = _mm256_set1_ps(0x1.555716p-5f);
40 const __m256 vc3 = _mm256_set1_ps(0x1.5554B0p-3f);
41 const __m256 vc2 = _mm256_set1_ps(0x1.FFFFFEp-2f);
42 const __m256 vone = _mm256_set1_ps(1.0f);
43
44 for (; n >= 32 * sizeof(float); n -= 32 * sizeof(float)) {
45 __m256 vx0 = _mm256_loadu_ps(x);
46 __m256 vx1 = _mm256_loadu_ps(x + 8);
47 __m256 vx2 = _mm256_loadu_ps(x + 16);
48 __m256 vx3 = _mm256_loadu_ps(x + 24);
49 x += 32;
50
51 const __m256 vz0 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx0, vprescale));
52 const __m256 vz1 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx1, vprescale));
53 const __m256 vz2 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx2, vprescale));
54 const __m256 vz3 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx3, vprescale));
55
56 __m256 vn0 = _mm256_add_ps(_mm256_mul_ps(vz0, vlog2e), vmagic_bias);
57 __m256 vn1 = _mm256_add_ps(_mm256_mul_ps(vz1, vlog2e), vmagic_bias);
58 __m256 vn2 = _mm256_add_ps(_mm256_mul_ps(vz2, vlog2e), vmagic_bias);
59 __m256 vn3 = _mm256_add_ps(_mm256_mul_ps(vz3, vlog2e), vmagic_bias);
60
61 const __m128 vs0_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn0)), 23));
62 const __m128 vs0_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn0, 1)), 23));
63 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
64 const __m128 vs1_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn1)), 23));
65 const __m128 vs1_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn1, 1)), 23));
66 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
67 const __m128 vs2_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn2)), 23));
68 const __m128 vs2_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn2, 1)), 23));
69 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
70 const __m128 vs3_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn3)), 23));
71 const __m128 vs3_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn3, 1)), 23));
72 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
73
74 __m256 vt0 = _mm256_add_ps(_mm256_mul_ps(vn0, vminus_ln2_hi), vz0);
75 __m256 vs0 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs0_lo), vs0_hi, 1);
76 __m256 vt1 = _mm256_add_ps(_mm256_mul_ps(vn1, vminus_ln2_hi), vz1);
77 __m256 vs1 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs1_lo), vs1_hi, 1);
78 __m256 vt2 = _mm256_add_ps(_mm256_mul_ps(vn2, vminus_ln2_hi), vz2);
79 __m256 vs2 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs2_lo), vs2_hi, 1);
80 __m256 vt3 = _mm256_add_ps(_mm256_mul_ps(vn3, vminus_ln2_hi), vz3);
81 __m256 vs3 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs3_lo), vs3_hi, 1);
82
83 vt0 = _mm256_add_ps(_mm256_mul_ps(vn0, vminus_ln2_lo), vt0);
84 vt1 = _mm256_add_ps(_mm256_mul_ps(vn1, vminus_ln2_lo), vt1);
85 vt2 = _mm256_add_ps(_mm256_mul_ps(vn2, vminus_ln2_lo), vt2);
86 vt3 = _mm256_add_ps(_mm256_mul_ps(vn3, vminus_ln2_lo), vt3);
87
88 __m256 vp0 = _mm256_add_ps(_mm256_mul_ps(vc6, vt0), vc5);
89 __m256 vp1 = _mm256_add_ps(_mm256_mul_ps(vc6, vt1), vc5);
90 __m256 vp2 = _mm256_add_ps(_mm256_mul_ps(vc6, vt2), vc5);
91 __m256 vp3 = _mm256_add_ps(_mm256_mul_ps(vc6, vt3), vc5);
92
93 vp0 = _mm256_add_ps(_mm256_mul_ps(vp0, vt0), vc4);
94 vp1 = _mm256_add_ps(_mm256_mul_ps(vp1, vt1), vc4);
95 vp2 = _mm256_add_ps(_mm256_mul_ps(vp2, vt2), vc4);
96 vp3 = _mm256_add_ps(_mm256_mul_ps(vp3, vt3), vc4);
97
98 vp0 = _mm256_add_ps(_mm256_mul_ps(vp0, vt0), vc3);
99 vp1 = _mm256_add_ps(_mm256_mul_ps(vp1, vt1), vc3);
100 vp2 = _mm256_add_ps(_mm256_mul_ps(vp2, vt2), vc3);
101 vp3 = _mm256_add_ps(_mm256_mul_ps(vp3, vt3), vc3);
102
103 vp0 = _mm256_add_ps(_mm256_mul_ps(vp0, vt0), vc2);
104 vp1 = _mm256_add_ps(_mm256_mul_ps(vp1, vt1), vc2);
105 vp2 = _mm256_add_ps(_mm256_mul_ps(vp2, vt2), vc2);
106 vp3 = _mm256_add_ps(_mm256_mul_ps(vp3, vt3), vc2);
107
108 vp0 = _mm256_mul_ps(vp0, vt0);
109 vp1 = _mm256_mul_ps(vp1, vt1);
110 vp2 = _mm256_mul_ps(vp2, vt2);
111 vp3 = _mm256_mul_ps(vp3, vt3);
112
113 vt0 = _mm256_mul_ps(vt0, vs0);
114 vs0 = _mm256_sub_ps(vs0, vone);
115 vt1 = _mm256_mul_ps(vt1, vs1);
116 vs1 = _mm256_sub_ps(vs1, vone);
117 vt2 = _mm256_mul_ps(vt2, vs2);
118 vs2 = _mm256_sub_ps(vs2, vone);
119 vt3 = _mm256_mul_ps(vt3, vs3);
120 vs3 = _mm256_sub_ps(vs3, vone);
121
122 vp0 = _mm256_add_ps(_mm256_mul_ps(vp0, vt0), vt0);
123 vp1 = _mm256_add_ps(_mm256_mul_ps(vp1, vt1), vt1);
124 vp2 = _mm256_add_ps(_mm256_mul_ps(vp2, vt2), vt2);
125 vp3 = _mm256_add_ps(_mm256_mul_ps(vp3, vt3), vt3);
126
127 const __m256 ve0 = _mm256_mul_ps(_mm256_add_ps(vp0, vs0), valpha);
128 vx0 = _mm256_mul_ps(vx0, vbeta);
129 const __m256 ve1 = _mm256_mul_ps(_mm256_add_ps(vp1, vs1), valpha);
130 vx1 = _mm256_mul_ps(vx1, vbeta);
131 const __m256 ve2 = _mm256_mul_ps(_mm256_add_ps(vp2, vs2), valpha);
132 vx2 = _mm256_mul_ps(vx2, vbeta);
133 const __m256 ve3 = _mm256_mul_ps(_mm256_add_ps(vp3, vs3), valpha);
134 vx3 = _mm256_mul_ps(vx3, vbeta);
135
136 const __m256 vy0 = _mm256_blendv_ps(vx0, ve0, vx0);
137 const __m256 vy1 = _mm256_blendv_ps(vx1, ve1, vx1);
138 const __m256 vy2 = _mm256_blendv_ps(vx2, ve2, vx2);
139 const __m256 vy3 = _mm256_blendv_ps(vx3, ve3, vx3);
140
141 _mm256_storeu_ps(y, vy0);
142 _mm256_storeu_ps(y + 8, vy1);
143 _mm256_storeu_ps(y + 16, vy2);
144 _mm256_storeu_ps(y + 24, vy3);
145 y += 32;
146 }
147 for (; n >= 8 * sizeof(float); n -= 8 * sizeof(float)) {
148 __m256 vx = _mm256_loadu_ps(x);
149 x += 8;
150
151 const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
152
153 __m256 vn = _mm256_add_ps(_mm256_mul_ps(vz, vlog2e), vmagic_bias);
154 const __m128 vs_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn)), 23));
155 const __m128 vs_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn, 1)), 23));
156 vn = _mm256_sub_ps(vn, vmagic_bias);
157
158 __m256 vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_hi), vz);
159 __m256 vs = _mm256_insertf128_ps(_mm256_castps128_ps256(vs_lo), vs_hi, 1);
160 vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_lo), vt);
161
162 __m256 vp = _mm256_add_ps(_mm256_mul_ps(vc6, vt), vc5);
163 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc4);
164 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc3);
165 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc2);
166 vp = _mm256_mul_ps(vp, vt);
167
168 vt = _mm256_mul_ps(vt, vs);
169 vs = _mm256_sub_ps(vs, vone);
170 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vt);
171
172 const __m256 ve = _mm256_mul_ps(_mm256_add_ps(vp, vs), valpha);
173 vx = _mm256_mul_ps(vx, vbeta);
174 const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
175
176 _mm256_storeu_ps(y, vy);
177 y += 8;
178 }
179 if XNN_UNLIKELY(n != 0) {
180 assert(n >= 1 * sizeof(float));
181 assert(n <= 7 * sizeof(float));
182 __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) &mask_table[7] - n));
183
184 __m256 vx = _mm256_maskload_ps(x, vmask);
185
186 const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
187
188 __m256 vn = _mm256_add_ps(_mm256_mul_ps(vz, vlog2e), vmagic_bias);
189 const __m128 vs_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn)), 23));
190 const __m128 vs_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn, 1)), 23));
191 vn = _mm256_sub_ps(vn, vmagic_bias);
192
193 __m256 vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_hi), vz);
194 __m256 vs = _mm256_insertf128_ps(_mm256_castps128_ps256(vs_lo), vs_hi, 1);
195 vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_lo), vt);
196
197 __m256 vp = _mm256_add_ps(_mm256_mul_ps(vc6, vt), vc5);
198 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc4);
199 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc3);
200 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc2);
201 vp = _mm256_mul_ps(vp, vt);
202
203 vt = _mm256_mul_ps(vt, vs);
204 vs = _mm256_sub_ps(vs, vone);
205 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vt);
206
207 const __m256 ve = _mm256_mul_ps(_mm256_add_ps(vp, vs), valpha);
208 vx = _mm256_mul_ps(vx, vbeta);
209 const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
210
211 // _mm256_maskstore_ps(y, vmask, vf) could be used here, but triggers msan failures (probably an msan bug).
212 __m128 vy_lo = _mm256_castps256_ps128(vy);
213 if (n & (4 * sizeof(float))) {
214 _mm_storeu_ps(y, vy_lo);
215 vy_lo = _mm256_extractf128_ps(vy, 1);
216 y += 4;
217 }
218 if (n & (2 * sizeof(float))) {
219 _mm_storel_pi((__m64*) y, vy_lo);
220 vy_lo = _mm_movehl_ps(vy_lo, vy_lo);
221 y += 2;
222 }
223 if (n & (1 * sizeof(float))) {
224 _mm_store_ss(y, vy_lo);
225 }
226 }
227 }
228