1 // Auto-generated file. Do not edit!
2 // Template: src/f32-velu/avx2-rr1-lut16-p3-gather.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/vunary.h>
16
17
18 extern XNN_INTERNAL const int xnn_table_exp2minus_k_over_16[16];
19
20 static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
21
xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x40(size_t n,const float * x,float * y,const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS (1)])22 void xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x40(
23 size_t n,
24 const float* x,
25 float* y,
26 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)])
27 {
28 assert(n % sizeof(float) == 0);
29
30 const __m256 vprescale = _mm256_broadcast_ps((const __m128*) params->sse.prescale);
31 const __m256 valpha = _mm256_broadcast_ps((const __m128*) params->sse.alpha);
32 const __m256 vbeta = _mm256_broadcast_ps((const __m128*) params->sse.beta);
33
34 const __m256 vsat_cutoff = _mm256_set1_ps(-0x1.154246p+4f);
35 const __m256 vmagic_bias = _mm256_set1_ps(0x1.800000p19f);
36 const __m256 vlog2e = _mm256_set1_ps(0x1.715476p+0f);
37 const __m256i vindex_mask = _mm256_set1_epi32(0xF);
38 const __m256 vminus_ln2 = _mm256_set1_ps(-0x1.62E43p-1f);
39 const __m256 vc3 = _mm256_set1_ps(0x1.55561Cp-3f);
40 const __m256 vc2 = _mm256_set1_ps(0x1.0001ECp-1f);
41
42 for (; n >= 40 * sizeof(float); n -= 40 * sizeof(float)) {
43 __m256 vx0 = _mm256_loadu_ps(x);
44 __m256 vx1 = _mm256_loadu_ps(x + 8);
45 __m256 vx2 = _mm256_loadu_ps(x + 16);
46 __m256 vx3 = _mm256_loadu_ps(x + 24);
47 __m256 vx4 = _mm256_loadu_ps(x + 32);
48 x += 40;
49
50 const __m256 vz0 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx0, vprescale));
51 const __m256 vz1 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx1, vprescale));
52 const __m256 vz2 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx2, vprescale));
53 const __m256 vz3 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx3, vprescale));
54 const __m256 vz4 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx4, vprescale));
55
56 __m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias);
57 __m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias);
58 __m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias);
59 __m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias);
60 __m256 vn4 = _mm256_fmadd_ps(vz4, vlog2e, vmagic_bias);
61
62 const __m256i vidx0 = _mm256_and_si256(_mm256_castps_si256(vn0), vindex_mask);
63 const __m256i vl0 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx0, sizeof(float));
64 const __m256i vidx1 = _mm256_and_si256(_mm256_castps_si256(vn1), vindex_mask);
65 const __m256i vl1 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx1, sizeof(float));
66 const __m256i vidx2 = _mm256_and_si256(_mm256_castps_si256(vn2), vindex_mask);
67 const __m256i vl2 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx2, sizeof(float));
68 const __m256i vidx3 = _mm256_and_si256(_mm256_castps_si256(vn3), vindex_mask);
69 const __m256i vl3 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx3, sizeof(float));
70 const __m256i vidx4 = _mm256_and_si256(_mm256_castps_si256(vn4), vindex_mask);
71 const __m256i vl4 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx4, sizeof(float));
72
73 const __m256i ven0 = _mm256_slli_epi32(_mm256_castps_si256(vn0), 19);
74 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
75 const __m256i ven1 = _mm256_slli_epi32(_mm256_castps_si256(vn1), 19);
76 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
77 const __m256i ven2 = _mm256_slli_epi32(_mm256_castps_si256(vn2), 19);
78 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
79 const __m256i ven3 = _mm256_slli_epi32(_mm256_castps_si256(vn3), 19);
80 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
81 const __m256i ven4 = _mm256_slli_epi32(_mm256_castps_si256(vn4), 19);
82 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
83
84 __m256 vs0 = _mm256_castsi256_ps(_mm256_add_epi32(vl0, ven0));
85 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0);
86 __m256 vs1 = _mm256_castsi256_ps(_mm256_add_epi32(vl1, ven1));
87 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1);
88 __m256 vs2 = _mm256_castsi256_ps(_mm256_add_epi32(vl2, ven2));
89 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2);
90 __m256 vs3 = _mm256_castsi256_ps(_mm256_add_epi32(vl3, ven3));
91 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3);
92 __m256 vs4 = _mm256_castsi256_ps(_mm256_add_epi32(vl4, ven4));
93 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vz4);
94
95 __m256 vp0 = _mm256_fmadd_ps(vc3, vt0, vc2);
96 __m256 vp1 = _mm256_fmadd_ps(vc3, vt1, vc2);
97 __m256 vp2 = _mm256_fmadd_ps(vc3, vt2, vc2);
98 __m256 vp3 = _mm256_fmadd_ps(vc3, vt3, vc2);
99 __m256 vp4 = _mm256_fmadd_ps(vc3, vt4, vc2);
100
101 vp0 = _mm256_mul_ps(vp0, vt0);
102 vt0 = _mm256_mul_ps(vt0, vs0);
103 vp1 = _mm256_mul_ps(vp1, vt1);
104 vt1 = _mm256_mul_ps(vt1, vs1);
105 vp2 = _mm256_mul_ps(vp2, vt2);
106 vt2 = _mm256_mul_ps(vt2, vs2);
107 vp3 = _mm256_mul_ps(vp3, vt3);
108 vt3 = _mm256_mul_ps(vt3, vs3);
109 vp4 = _mm256_mul_ps(vp4, vt4);
110 vt4 = _mm256_mul_ps(vt4, vs4);
111
112 vs0 = _mm256_fmsub_ps(vs0, valpha, valpha);
113 vp0 = _mm256_fmadd_ps(vp0, vt0, vt0);
114 vs1 = _mm256_fmsub_ps(vs1, valpha, valpha);
115 vp1 = _mm256_fmadd_ps(vp1, vt1, vt1);
116 vs2 = _mm256_fmsub_ps(vs2, valpha, valpha);
117 vp2 = _mm256_fmadd_ps(vp2, vt2, vt2);
118 vs3 = _mm256_fmsub_ps(vs3, valpha, valpha);
119 vp3 = _mm256_fmadd_ps(vp3, vt3, vt3);
120 vs4 = _mm256_fmsub_ps(vs4, valpha, valpha);
121 vp4 = _mm256_fmadd_ps(vp4, vt4, vt4);
122
123 const __m256 ve0 = _mm256_fmadd_ps(vp0, valpha, vs0);
124 vx0 = _mm256_mul_ps(vx0, vbeta);
125 const __m256 ve1 = _mm256_fmadd_ps(vp1, valpha, vs1);
126 vx1 = _mm256_mul_ps(vx1, vbeta);
127 const __m256 ve2 = _mm256_fmadd_ps(vp2, valpha, vs2);
128 vx2 = _mm256_mul_ps(vx2, vbeta);
129 const __m256 ve3 = _mm256_fmadd_ps(vp3, valpha, vs3);
130 vx3 = _mm256_mul_ps(vx3, vbeta);
131 const __m256 ve4 = _mm256_fmadd_ps(vp4, valpha, vs4);
132 vx4 = _mm256_mul_ps(vx4, vbeta);
133
134 const __m256 vy0 = _mm256_blendv_ps(vx0, ve0, vx0);
135 const __m256 vy1 = _mm256_blendv_ps(vx1, ve1, vx1);
136 const __m256 vy2 = _mm256_blendv_ps(vx2, ve2, vx2);
137 const __m256 vy3 = _mm256_blendv_ps(vx3, ve3, vx3);
138 const __m256 vy4 = _mm256_blendv_ps(vx4, ve4, vx4);
139
140 _mm256_storeu_ps(y, vy0);
141 _mm256_storeu_ps(y + 8, vy1);
142 _mm256_storeu_ps(y + 16, vy2);
143 _mm256_storeu_ps(y + 24, vy3);
144 _mm256_storeu_ps(y + 32, vy4);
145 y += 40;
146 }
147 for (; n >= 8 * sizeof(float); n -= 8 * sizeof(float)) {
148 __m256 vx = _mm256_loadu_ps(x);
149 x += 8;
150
151 const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
152
153 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
154 const __m256i vidx = _mm256_and_si256(_mm256_castps_si256(vn), vindex_mask);
155 const __m256i vl = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx, sizeof(float));
156
157 const __m256i ven = _mm256_slli_epi32(_mm256_castps_si256(vn), 19);
158 vn = _mm256_sub_ps(vn, vmagic_bias);
159
160 __m256 vs = _mm256_castsi256_ps(_mm256_add_epi32(vl, ven));
161 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
162
163 __m256 vp = _mm256_fmadd_ps(vc3, vt, vc2);
164 vp = _mm256_mul_ps(vp, vt);
165
166 vt = _mm256_mul_ps(vt, vs);
167 vs = _mm256_fmsub_ps(vs, valpha, valpha);
168 vp = _mm256_fmadd_ps(vp, vt, vt);
169 const __m256 ve = _mm256_fmadd_ps(vp, valpha, vs);
170
171 vx = _mm256_mul_ps(vx, vbeta);
172 const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
173
174 _mm256_storeu_ps(y, vy);
175 y += 8;
176 }
177 if XNN_UNLIKELY(n != 0) {
178 assert(n >= 1 * sizeof(float));
179 assert(n <= 7 * sizeof(float));
180 __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) &mask_table[7] - n));
181
182 __m256 vx = _mm256_maskload_ps(x, vmask);
183
184 const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
185
186 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
187 const __m256i vidx = _mm256_and_si256(_mm256_castps_si256(vn), vindex_mask);
188 const __m256i vl = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx, sizeof(float));
189
190 const __m256i ven = _mm256_slli_epi32(_mm256_castps_si256(vn), 19);
191 vn = _mm256_sub_ps(vn, vmagic_bias);
192
193 __m256 vs = _mm256_castsi256_ps(_mm256_add_epi32(vl, ven));
194 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
195
196 __m256 vp = _mm256_fmadd_ps(vc3, vt, vc2);
197 vp = _mm256_mul_ps(vp, vt);
198
199 vt = _mm256_mul_ps(vt, vs);
200 vs = _mm256_fmsub_ps(vs, valpha, valpha);
201 vp = _mm256_fmadd_ps(vp, vt, vt);
202 const __m256 ve = _mm256_fmadd_ps(vp, valpha, vs);
203
204 vx = _mm256_mul_ps(vx, vbeta);
205 const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
206
207 // _mm256_maskstore_ps(y, vmask, vf) could be used here, but triggers msan failures (probably an msan bug).
208 __m128 vy_lo = _mm256_castps256_ps128(vy);
209 if (n & (4 * sizeof(float))) {
210 _mm_storeu_ps(y, vy_lo);
211 vy_lo = _mm256_extractf128_ps(vy, 1);
212 y += 4;
213 }
214 if (n & (2 * sizeof(float))) {
215 _mm_storel_pi((__m64*) y, vy_lo);
216 vy_lo = _mm_movehl_ps(vy_lo, vy_lo);
217 y += 2;
218 }
219 if (n & (1 * sizeof(float))) {
220 _mm_store_ss(y, vy_lo);
221 }
222 }
223 }
224