1 // Auto-generated file. Do not edit!
2 // Template: src/f32-velu/avx2-rr1-p6.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/vunary.h>
16
17
18 static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
19
xnn_f32_velu_ukernel__avx2_rr1_p6_x80(size_t n,const float * x,float * y,const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS (1)])20 void xnn_f32_velu_ukernel__avx2_rr1_p6_x80(
21 size_t n,
22 const float* x,
23 float* y,
24 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)])
25 {
26 assert(n % sizeof(float) == 0);
27
28 const __m256 vprescale = _mm256_broadcast_ps((const __m128*) params->sse.prescale);
29 const __m256 valpha = _mm256_broadcast_ps((const __m128*) params->sse.alpha);
30 const __m256 vbeta = _mm256_broadcast_ps((const __m128*) params->sse.beta);
31
32 const __m256 vsat_cutoff = _mm256_set1_ps(-0x1.154246p+4f);
33 const __m256 vmagic_bias = _mm256_set1_ps(0x1.8000FEp23f);
34 const __m256 vlog2e = _mm256_set1_ps(0x1.715476p+0f);
35 const __m256 vminus_ln2 = _mm256_set1_ps(-0x1.62E43p-1f);
36 const __m256 vc6 = _mm256_set1_ps(0x1.6b7338p-10f);
37 const __m256 vc5 = _mm256_set1_ps(0x1.12278Ep-7f);
38 const __m256 vc4 = _mm256_set1_ps(0x1.555716p-5f);
39 const __m256 vc3 = _mm256_set1_ps(0x1.5554B0p-3f);
40 const __m256 vc2 = _mm256_set1_ps(0x1.FFFFFEp-2f);
41
42 for (; n >= 80 * sizeof(float); n -= 80 * sizeof(float)) {
43 __m256 vx0 = _mm256_loadu_ps(x);
44 __m256 vx1 = _mm256_loadu_ps(x + 8);
45 __m256 vx2 = _mm256_loadu_ps(x + 16);
46 __m256 vx3 = _mm256_loadu_ps(x + 24);
47 __m256 vx4 = _mm256_loadu_ps(x + 32);
48 __m256 vx5 = _mm256_loadu_ps(x + 40);
49 __m256 vx6 = _mm256_loadu_ps(x + 48);
50 __m256 vx7 = _mm256_loadu_ps(x + 56);
51 __m256 vx8 = _mm256_loadu_ps(x + 64);
52 __m256 vx9 = _mm256_loadu_ps(x + 72);
53 x += 80;
54
55 const __m256 vz0 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx0, vprescale));
56 const __m256 vz1 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx1, vprescale));
57 const __m256 vz2 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx2, vprescale));
58 const __m256 vz3 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx3, vprescale));
59 const __m256 vz4 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx4, vprescale));
60 const __m256 vz5 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx5, vprescale));
61 const __m256 vz6 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx6, vprescale));
62 const __m256 vz7 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx7, vprescale));
63 const __m256 vz8 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx8, vprescale));
64 const __m256 vz9 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx9, vprescale));
65
66 __m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias);
67 __m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias);
68 __m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias);
69 __m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias);
70 __m256 vn4 = _mm256_fmadd_ps(vz4, vlog2e, vmagic_bias);
71 __m256 vn5 = _mm256_fmadd_ps(vz5, vlog2e, vmagic_bias);
72 __m256 vn6 = _mm256_fmadd_ps(vz6, vlog2e, vmagic_bias);
73 __m256 vn7 = _mm256_fmadd_ps(vz7, vlog2e, vmagic_bias);
74 __m256 vn8 = _mm256_fmadd_ps(vz8, vlog2e, vmagic_bias);
75 __m256 vn9 = _mm256_fmadd_ps(vz9, vlog2e, vmagic_bias);
76
77 __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23));
78 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
79 __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23));
80 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
81 __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23));
82 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
83 __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23));
84 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
85 __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23));
86 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
87 __m256 vs5 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn5), 23));
88 vn5 = _mm256_sub_ps(vn5, vmagic_bias);
89 __m256 vs6 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn6), 23));
90 vn6 = _mm256_sub_ps(vn6, vmagic_bias);
91 __m256 vs7 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn7), 23));
92 vn7 = _mm256_sub_ps(vn7, vmagic_bias);
93 __m256 vs8 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn8), 23));
94 vn8 = _mm256_sub_ps(vn8, vmagic_bias);
95 __m256 vs9 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn9), 23));
96 vn9 = _mm256_sub_ps(vn9, vmagic_bias);
97
98 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0);
99 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1);
100 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2);
101 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3);
102 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vz4);
103 __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2, vz5);
104 __m256 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2, vz6);
105 __m256 vt7 = _mm256_fmadd_ps(vn7, vminus_ln2, vz7);
106 __m256 vt8 = _mm256_fmadd_ps(vn8, vminus_ln2, vz8);
107 __m256 vt9 = _mm256_fmadd_ps(vn9, vminus_ln2, vz9);
108
109 __m256 vp0 = _mm256_fmadd_ps(vc6, vt0, vc5);
110 __m256 vp1 = _mm256_fmadd_ps(vc6, vt1, vc5);
111 __m256 vp2 = _mm256_fmadd_ps(vc6, vt2, vc5);
112 __m256 vp3 = _mm256_fmadd_ps(vc6, vt3, vc5);
113 __m256 vp4 = _mm256_fmadd_ps(vc6, vt4, vc5);
114 __m256 vp5 = _mm256_fmadd_ps(vc6, vt5, vc5);
115 __m256 vp6 = _mm256_fmadd_ps(vc6, vt6, vc5);
116 __m256 vp7 = _mm256_fmadd_ps(vc6, vt7, vc5);
117 __m256 vp8 = _mm256_fmadd_ps(vc6, vt8, vc5);
118 __m256 vp9 = _mm256_fmadd_ps(vc6, vt9, vc5);
119
120 vp0 = _mm256_fmadd_ps(vp0, vt0, vc4);
121 vp1 = _mm256_fmadd_ps(vp1, vt1, vc4);
122 vp2 = _mm256_fmadd_ps(vp2, vt2, vc4);
123 vp3 = _mm256_fmadd_ps(vp3, vt3, vc4);
124 vp4 = _mm256_fmadd_ps(vp4, vt4, vc4);
125 vp5 = _mm256_fmadd_ps(vp5, vt5, vc4);
126 vp6 = _mm256_fmadd_ps(vp6, vt6, vc4);
127 vp7 = _mm256_fmadd_ps(vp7, vt7, vc4);
128 vp8 = _mm256_fmadd_ps(vp8, vt8, vc4);
129 vp9 = _mm256_fmadd_ps(vp9, vt9, vc4);
130
131 vp0 = _mm256_fmadd_ps(vp0, vt0, vc3);
132 vp1 = _mm256_fmadd_ps(vp1, vt1, vc3);
133 vp2 = _mm256_fmadd_ps(vp2, vt2, vc3);
134 vp3 = _mm256_fmadd_ps(vp3, vt3, vc3);
135 vp4 = _mm256_fmadd_ps(vp4, vt4, vc3);
136 vp5 = _mm256_fmadd_ps(vp5, vt5, vc3);
137 vp6 = _mm256_fmadd_ps(vp6, vt6, vc3);
138 vp7 = _mm256_fmadd_ps(vp7, vt7, vc3);
139 vp8 = _mm256_fmadd_ps(vp8, vt8, vc3);
140 vp9 = _mm256_fmadd_ps(vp9, vt9, vc3);
141
142 vp0 = _mm256_fmadd_ps(vp0, vt0, vc2);
143 vp1 = _mm256_fmadd_ps(vp1, vt1, vc2);
144 vp2 = _mm256_fmadd_ps(vp2, vt2, vc2);
145 vp3 = _mm256_fmadd_ps(vp3, vt3, vc2);
146 vp4 = _mm256_fmadd_ps(vp4, vt4, vc2);
147 vp5 = _mm256_fmadd_ps(vp5, vt5, vc2);
148 vp6 = _mm256_fmadd_ps(vp6, vt6, vc2);
149 vp7 = _mm256_fmadd_ps(vp7, vt7, vc2);
150 vp8 = _mm256_fmadd_ps(vp8, vt8, vc2);
151 vp9 = _mm256_fmadd_ps(vp9, vt9, vc2);
152
153 vp0 = _mm256_mul_ps(vp0, vt0);
154 vt0 = _mm256_mul_ps(vt0, vs0);
155 vp1 = _mm256_mul_ps(vp1, vt1);
156 vt1 = _mm256_mul_ps(vt1, vs1);
157 vp2 = _mm256_mul_ps(vp2, vt2);
158 vt2 = _mm256_mul_ps(vt2, vs2);
159 vp3 = _mm256_mul_ps(vp3, vt3);
160 vt3 = _mm256_mul_ps(vt3, vs3);
161 vp4 = _mm256_mul_ps(vp4, vt4);
162 vt4 = _mm256_mul_ps(vt4, vs4);
163 vp5 = _mm256_mul_ps(vp5, vt5);
164 vt5 = _mm256_mul_ps(vt5, vs5);
165 vp6 = _mm256_mul_ps(vp6, vt6);
166 vt6 = _mm256_mul_ps(vt6, vs6);
167 vp7 = _mm256_mul_ps(vp7, vt7);
168 vt7 = _mm256_mul_ps(vt7, vs7);
169 vp8 = _mm256_mul_ps(vp8, vt8);
170 vt8 = _mm256_mul_ps(vt8, vs8);
171 vp9 = _mm256_mul_ps(vp9, vt9);
172 vt9 = _mm256_mul_ps(vt9, vs9);
173
174 vs0 = _mm256_fmsub_ps(vs0, valpha, valpha);
175 vp0 = _mm256_fmadd_ps(vp0, vt0, vt0);
176 vs1 = _mm256_fmsub_ps(vs1, valpha, valpha);
177 vp1 = _mm256_fmadd_ps(vp1, vt1, vt1);
178 vs2 = _mm256_fmsub_ps(vs2, valpha, valpha);
179 vp2 = _mm256_fmadd_ps(vp2, vt2, vt2);
180 vs3 = _mm256_fmsub_ps(vs3, valpha, valpha);
181 vp3 = _mm256_fmadd_ps(vp3, vt3, vt3);
182 vs4 = _mm256_fmsub_ps(vs4, valpha, valpha);
183 vp4 = _mm256_fmadd_ps(vp4, vt4, vt4);
184 vs5 = _mm256_fmsub_ps(vs5, valpha, valpha);
185 vp5 = _mm256_fmadd_ps(vp5, vt5, vt5);
186 vs6 = _mm256_fmsub_ps(vs6, valpha, valpha);
187 vp6 = _mm256_fmadd_ps(vp6, vt6, vt6);
188 vs7 = _mm256_fmsub_ps(vs7, valpha, valpha);
189 vp7 = _mm256_fmadd_ps(vp7, vt7, vt7);
190 vs8 = _mm256_fmsub_ps(vs8, valpha, valpha);
191 vp8 = _mm256_fmadd_ps(vp8, vt8, vt8);
192 vs9 = _mm256_fmsub_ps(vs9, valpha, valpha);
193 vp9 = _mm256_fmadd_ps(vp9, vt9, vt9);
194
195 const __m256 ve0 = _mm256_fmadd_ps(vp0, valpha, vs0);
196 vx0 = _mm256_mul_ps(vx0, vbeta);
197 const __m256 ve1 = _mm256_fmadd_ps(vp1, valpha, vs1);
198 vx1 = _mm256_mul_ps(vx1, vbeta);
199 const __m256 ve2 = _mm256_fmadd_ps(vp2, valpha, vs2);
200 vx2 = _mm256_mul_ps(vx2, vbeta);
201 const __m256 ve3 = _mm256_fmadd_ps(vp3, valpha, vs3);
202 vx3 = _mm256_mul_ps(vx3, vbeta);
203 const __m256 ve4 = _mm256_fmadd_ps(vp4, valpha, vs4);
204 vx4 = _mm256_mul_ps(vx4, vbeta);
205 const __m256 ve5 = _mm256_fmadd_ps(vp5, valpha, vs5);
206 vx5 = _mm256_mul_ps(vx5, vbeta);
207 const __m256 ve6 = _mm256_fmadd_ps(vp6, valpha, vs6);
208 vx6 = _mm256_mul_ps(vx6, vbeta);
209 const __m256 ve7 = _mm256_fmadd_ps(vp7, valpha, vs7);
210 vx7 = _mm256_mul_ps(vx7, vbeta);
211 const __m256 ve8 = _mm256_fmadd_ps(vp8, valpha, vs8);
212 vx8 = _mm256_mul_ps(vx8, vbeta);
213 const __m256 ve9 = _mm256_fmadd_ps(vp9, valpha, vs9);
214 vx9 = _mm256_mul_ps(vx9, vbeta);
215
216 const __m256 vy0 = _mm256_blendv_ps(vx0, ve0, vx0);
217 const __m256 vy1 = _mm256_blendv_ps(vx1, ve1, vx1);
218 const __m256 vy2 = _mm256_blendv_ps(vx2, ve2, vx2);
219 const __m256 vy3 = _mm256_blendv_ps(vx3, ve3, vx3);
220 const __m256 vy4 = _mm256_blendv_ps(vx4, ve4, vx4);
221 const __m256 vy5 = _mm256_blendv_ps(vx5, ve5, vx5);
222 const __m256 vy6 = _mm256_blendv_ps(vx6, ve6, vx6);
223 const __m256 vy7 = _mm256_blendv_ps(vx7, ve7, vx7);
224 const __m256 vy8 = _mm256_blendv_ps(vx8, ve8, vx8);
225 const __m256 vy9 = _mm256_blendv_ps(vx9, ve9, vx9);
226
227 _mm256_storeu_ps(y, vy0);
228 _mm256_storeu_ps(y + 8, vy1);
229 _mm256_storeu_ps(y + 16, vy2);
230 _mm256_storeu_ps(y + 24, vy3);
231 _mm256_storeu_ps(y + 32, vy4);
232 _mm256_storeu_ps(y + 40, vy5);
233 _mm256_storeu_ps(y + 48, vy6);
234 _mm256_storeu_ps(y + 56, vy7);
235 _mm256_storeu_ps(y + 64, vy8);
236 _mm256_storeu_ps(y + 72, vy9);
237 y += 80;
238 }
239 for (; n >= 8 * sizeof(float); n -= 8 * sizeof(float)) {
240 __m256 vx = _mm256_loadu_ps(x);
241 x += 8;
242
243 const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
244
245 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
246 __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
247 vn = _mm256_sub_ps(vn, vmagic_bias);
248
249 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
250
251 __m256 vp = _mm256_fmadd_ps(vc6, vt, vc5);
252 vp = _mm256_fmadd_ps(vp, vt, vc4);
253 vp = _mm256_fmadd_ps(vp, vt, vc3);
254 vp = _mm256_fmadd_ps(vp, vt, vc2);
255 vp = _mm256_mul_ps(vp, vt);
256
257 vt = _mm256_mul_ps(vt, vs);
258 vs = _mm256_fmsub_ps(vs, valpha, valpha);
259 vp = _mm256_fmadd_ps(vp, vt, vt);
260 const __m256 ve = _mm256_fmadd_ps(vp, valpha, vs);
261
262 vx = _mm256_mul_ps(vx, vbeta);
263 const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
264
265 _mm256_storeu_ps(y, vy);
266 y += 8;
267 }
268 if XNN_UNLIKELY(n != 0) {
269 assert(n >= 1 * sizeof(float));
270 assert(n <= 7 * sizeof(float));
271 __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) &mask_table[7] - n));
272
273 __m256 vx = _mm256_maskload_ps(x, vmask);
274
275 const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
276
277 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
278 __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
279 vn = _mm256_sub_ps(vn, vmagic_bias);
280
281 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
282
283 __m256 vp = _mm256_fmadd_ps(vc6, vt, vc5);
284 vp = _mm256_fmadd_ps(vp, vt, vc4);
285 vp = _mm256_fmadd_ps(vp, vt, vc3);
286 vp = _mm256_fmadd_ps(vp, vt, vc2);
287 vp = _mm256_mul_ps(vp, vt);
288
289 vt = _mm256_mul_ps(vt, vs);
290 vs = _mm256_fmsub_ps(vs, valpha, valpha);
291 vp = _mm256_fmadd_ps(vp, vt, vt);
292 const __m256 ve = _mm256_fmadd_ps(vp, valpha, vs);
293
294 vx = _mm256_mul_ps(vx, vbeta);
295 const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
296
297 // _mm256_maskstore_ps(y, vmask, vf) could be used here, but triggers msan failures (probably an msan bug).
298 __m128 vy_lo = _mm256_castps256_ps128(vy);
299 if (n & (4 * sizeof(float))) {
300 _mm_storeu_ps(y, vy_lo);
301 vy_lo = _mm256_extractf128_ps(vy, 1);
302 y += 4;
303 }
304 if (n & (2 * sizeof(float))) {
305 _mm_storel_pi((__m64*) y, vy_lo);
306 vy_lo = _mm_movehl_ps(vy_lo, vy_lo);
307 y += 2;
308 }
309 if (n & (1 * sizeof(float))) {
310 _mm_store_ss(y, vy_lo);
311 }
312 }
313 }
314