1 // Auto-generated file. Do not edit!
2 // Template: src/f32-vmulcaddc/wasmsimd.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <wasm_simd128.h>
13
14 #include <xnnpack/math.h>
15 #include <xnnpack/vmulcaddc.h>
16
17
xnn_f32_vmulcaddc_minmax_ukernel_c4__wasmsimd_arm_2x(size_t rows,size_t channels,const float * restrict input,size_t input_stride,const float * restrict weights,float * restrict output,size_t output_stride,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_vmulcaddc_minmax_ukernel_c4__wasmsimd_arm_2x(
19 size_t rows,
20 size_t channels,
21 const float*restrict input,
22 size_t input_stride,
23 const float*restrict weights,
24 float*restrict output,
25 size_t output_stride,
26 const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
27 {
28 assert(rows != 0);
29 assert(channels != 0);
30 assert(channels % sizeof(float) == 0);
31
32 const float* i0 = input;
33 float* o0 = output;
34 const float* i1 = (const float*) ((uintptr_t) i0 + input_stride);
35 float* o1 = (float*) ((uintptr_t) o0 + output_stride);
36 if XNN_UNPREDICTABLE(rows < 2) {
37 i1 = i0;
38 o1 = o0;
39 }
40
41 const size_t input_increment = input_stride * 2 - channels;
42 const size_t output_increment = output_stride * 2 - channels;
43
44 const v128_t vmin = wasm_v32x4_load_splat(¶ms->scalar.min);
45 const v128_t vmax = wasm_v32x4_load_splat(¶ms->scalar.max);
46 do {
47 const float* w = weights;
48 size_t c = channels;
49 for (; c >= 4 * sizeof(float); c -= 4 * sizeof(float)) {
50 const v128_t vscale0123 = wasm_v128_load(w);
51
52 v128_t vacc0x0123 = wasm_v128_load(i0);
53 i0 += 4;
54 v128_t vacc1x0123 = wasm_v128_load(i1);
55 i1 += 4;
56
57 const v128_t vbias0123 = wasm_v128_load(w + 4);
58
59 vacc0x0123 = wasm_f32x4_add(vbias0123, wasm_f32x4_mul(vscale0123, vacc0x0123));
60 vacc1x0123 = wasm_f32x4_add(vbias0123, wasm_f32x4_mul(vscale0123, vacc1x0123));
61
62 vacc0x0123 = wasm_f32x4_max(vacc0x0123, vmin);
63 vacc1x0123 = wasm_f32x4_max(vacc1x0123, vmin);
64
65 vacc0x0123 = wasm_f32x4_min(vacc0x0123, vmax);
66 vacc1x0123 = wasm_f32x4_min(vacc1x0123, vmax);
67
68 wasm_v128_store(o0, vacc0x0123);
69 o0 += 4;
70 wasm_v128_store(o1, vacc1x0123);
71 o1 += 4;
72
73 w += 8;
74 }
75 if XNN_UNLIKELY(c != 0) {
76 const v128_t vscale = wasm_v128_load(w);
77
78 v128_t vacc0 = wasm_v128_load(i0);
79 i0 = (const float*) ((uintptr_t) i0 + c);
80 v128_t vacc1 = wasm_v128_load(i1);
81 i1 = (const float*) ((uintptr_t) i1 + c);
82
83 const v128_t vbias = wasm_v128_load(w + 4);
84
85 vacc0 = wasm_f32x4_add(vbias, wasm_f32x4_mul(vscale, vacc0));
86 vacc1 = wasm_f32x4_add(vbias, wasm_f32x4_mul(vscale, vacc1));
87
88 vacc0 = wasm_f32x4_max(vacc0, vmin);
89 vacc1 = wasm_f32x4_max(vacc1, vmin);
90
91 vacc0 = wasm_f32x4_min(vacc0, vmax);
92 vacc1 = wasm_f32x4_min(vacc1, vmax);
93
94 if (c & (2 * sizeof(float))) {
95 *((double*) o0) = wasm_f64x2_extract_lane(vacc0, 0);
96 *((double*) o1) = wasm_f64x2_extract_lane(vacc1, 0);
97
98 vacc0 = wasm_v32x4_shuffle(vacc0, vacc0, 2, 3, 2, 3);
99 vacc1 = wasm_v32x4_shuffle(vacc1, vacc1, 2, 3, 2, 3);
100
101 o0 += 2;
102 o1 += 2;
103 }
104 if (c & (1 * sizeof(float))) {
105 *o0++ = wasm_f32x4_extract_lane(vacc0, 0);
106 *o1++ = wasm_f32x4_extract_lane(vacc1, 0);
107 }
108 }
109 i0 = (const float*) ((uintptr_t) i0 + input_increment);
110 o0 = (float*) ((uintptr_t) o0 + output_increment);
111 i1 = (const float*) ((uintptr_t) i1 + input_increment);
112 o1 = (float*) ((uintptr_t) o1 + output_increment);
113 if XNN_UNPREDICTABLE(rows < 4) {
114 i1 = i0;
115 o1 = o0;
116 }
117 rows = doz(rows, 2);
118 } while (rows != 0);
119 }
120