1 // Auto-generated file. Do not edit!
2 // Template: src/qs8-vadd/neon-ld64.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/vadd.h>
15
16
xnn_qs8_vadd_minmax_ukernel__neon_ld64_x16(size_t n,const int8_t * input_x,const int8_t * input_y,int8_t * output,const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_qs8_vadd_minmax_ukernel__neon_ld64_x16(
18 size_t n,
19 const int8_t* input_x,
20 const int8_t* input_y,
21 int8_t* output,
22 const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
23 {
24 const int8x8_t vx_zero_point = vld1_dup_s8(¶ms->neon.x_zero_point);
25 const int8x8_t vy_zero_point = vld1_dup_s8(¶ms->neon.y_zero_point);
26 const int32x4_t vx_multiplier = vld1q_dup_s32(¶ms->neon.x_multiplier);
27 const int32x4_t vy_multiplier = vld1q_dup_s32(¶ms->neon.y_multiplier);
28 const int32x4_t vright_shift = vld1q_dup_s32(¶ms->neon.right_shift);
29 const int32x4_t vzero_shift_mask = vreinterpretq_s32_u32(vceqq_s32(vright_shift, vmovq_n_s32(0)));
30 const int16x8_t voutput_zero_point = vld1q_dup_s16(¶ms->neon.output_zero_point);
31 const int8x16_t voutput_min = vld1q_dup_s8(¶ms->neon.output_min);
32 const int8x16_t voutput_max = vld1q_dup_s8(¶ms->neon.output_max);
33
34 for (; n >= 16 * sizeof(int8_t); n -= 16 * sizeof(int8_t)) {
35 const int8x8_t vx01234567 = vld1_s8(input_x); input_x += 8;
36 const int8x8_t vy01234567 = vld1_s8(input_y); input_y += 8;
37 const int8x8_t vx89ABCDEF = vld1_s8(input_x); input_x += 8;
38 const int8x8_t vy89ABCDEF = vld1_s8(input_y); input_y += 8;
39
40 const int16x8_t vex01234567 = vsubl_s8(vx01234567, vx_zero_point);
41 const int16x8_t vey01234567 = vsubl_s8(vy01234567, vy_zero_point);
42 const int16x8_t vex89ABCDEF = vsubl_s8(vx89ABCDEF, vx_zero_point);
43 const int16x8_t vey89ABCDEF = vsubl_s8(vy89ABCDEF, vy_zero_point);
44
45 int32x4_t vacc0123 = vmulq_s32(vmovl_s16(vget_low_s16(vex01234567)), vx_multiplier);
46 int32x4_t vacc4567 = vmulq_s32(vmovl_s16(vget_high_s16(vex01234567)), vx_multiplier);
47 int32x4_t vacc89AB = vmulq_s32(vmovl_s16(vget_low_s16(vex89ABCDEF)), vx_multiplier);
48 int32x4_t vaccCDEF = vmulq_s32(vmovl_s16(vget_high_s16(vex89ABCDEF)), vx_multiplier);
49
50 vacc0123 = vmlaq_s32(vacc0123, vmovl_s16(vget_low_s16(vey01234567)), vy_multiplier);
51 vacc4567 = vmlaq_s32(vacc4567, vmovl_s16(vget_high_s16(vey01234567)), vy_multiplier);
52 vacc89AB = vmlaq_s32(vacc89AB, vmovl_s16(vget_low_s16(vey89ABCDEF)), vy_multiplier);
53 vaccCDEF = vmlaq_s32(vaccCDEF, vmovl_s16(vget_high_s16(vey89ABCDEF)), vy_multiplier);
54
55 vacc0123 = vsraq_n_s32(vacc0123, vbicq_s32(vacc0123, vzero_shift_mask), 31);
56 vacc4567 = vsraq_n_s32(vacc4567, vbicq_s32(vacc4567, vzero_shift_mask), 31);
57 vacc89AB = vsraq_n_s32(vacc89AB, vbicq_s32(vacc89AB, vzero_shift_mask), 31);
58 vaccCDEF = vsraq_n_s32(vaccCDEF, vbicq_s32(vaccCDEF, vzero_shift_mask), 31);
59
60 vacc0123 = vrshlq_s32(vacc0123, vright_shift);
61 vacc4567 = vrshlq_s32(vacc4567, vright_shift);
62 vacc89AB = vrshlq_s32(vacc89AB, vright_shift);
63 vaccCDEF = vrshlq_s32(vaccCDEF, vright_shift);
64
65 const int16x8_t vacc01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567)), voutput_zero_point);
66 const int16x8_t vacc89ABCDEF = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc89AB), vqmovn_s32(vaccCDEF)), voutput_zero_point);
67
68 int8x16_t vout0123456789ABCDEF = vcombine_s8(vqmovn_s16(vacc01234567), vqmovn_s16(vacc89ABCDEF));
69
70 vout0123456789ABCDEF = vmaxq_s8(vout0123456789ABCDEF, voutput_min);
71
72 vout0123456789ABCDEF = vminq_s8(vout0123456789ABCDEF, voutput_max);
73
74 vst1q_s8(output, vout0123456789ABCDEF); output += 16;
75 }
76 if XNN_UNLIKELY(n != 0) {
77 do {
78 const int8x8_t vx01234567 = vld1_s8(input_x); input_x += 8;
79 const int8x8_t vy01234567 = vld1_s8(input_y); input_y += 8;
80
81 const int16x8_t vex01234567 = vsubl_s8(vx01234567, vx_zero_point);
82 const int16x8_t vey01234567 = vsubl_s8(vy01234567, vy_zero_point);
83
84 int32x4_t vacc0123 = vmulq_s32(vmovl_s16(vget_low_s16(vex01234567)), vx_multiplier);
85 int32x4_t vacc4567 = vmulq_s32(vmovl_s16(vget_high_s16(vex01234567)), vx_multiplier);
86
87 vacc0123 = vmlaq_s32(vacc0123, vmovl_s16(vget_low_s16(vey01234567)), vy_multiplier);
88 vacc4567 = vmlaq_s32(vacc4567, vmovl_s16(vget_high_s16(vey01234567)), vy_multiplier);
89
90 vacc0123 = vsraq_n_s32(vacc0123, vbicq_s32(vacc0123, vzero_shift_mask), 31);
91 vacc4567 = vsraq_n_s32(vacc4567, vbicq_s32(vacc4567, vzero_shift_mask), 31);
92
93 vacc0123 = vrshlq_s32(vacc0123, vright_shift);
94 vacc4567 = vrshlq_s32(vacc4567, vright_shift);
95
96 const int16x8_t vacc01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567)), voutput_zero_point);
97
98 int8x8_t vout01234567 = vqmovn_s16(vacc01234567);
99 vout01234567 = vmax_s8(vout01234567, vget_low_s8(voutput_min));
100 vout01234567 = vmin_s8(vout01234567, vget_low_s8(voutput_max));
101
102 if XNN_LIKELY(n >= (8 * sizeof(int8_t))) {
103 vst1_s8(output, vout01234567); output += 8;
104 n -= 8 * sizeof(int8_t);
105 } else {
106 if (n & (4 * sizeof(int8_t))) {
107 vst1_lane_u32(__builtin_assume_aligned(output, 1), vreinterpret_u32_s8(vout01234567), 0); output += 4;
108 vout01234567 = vext_s8(vout01234567, vout01234567, 4);
109 }
110 if (n & (2 * sizeof(int8_t))) {
111 vst1_lane_u16(__builtin_assume_aligned(output, 1), vreinterpret_u16_s8(vout01234567), 0); output += 2;
112 vout01234567 = vext_s8(vout01234567, vout01234567, 2);
113 }
114 if (n & (1 * sizeof(int8_t))) {
115 vst1_lane_s8(output, vout01234567, 0);
116 }
117 n = 0;
118 }
119 } while (n != 0);
120 }
121 }
122