1 /* 2 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef FVP_PWRC_H 8 #define FVP_PWRC_H 9 10 /* FVP Power controller register offset etc */ 11 #define PPOFFR_OFF U(0x0) 12 #define PPONR_OFF U(0x4) 13 #define PCOFFR_OFF U(0x8) 14 #define PWKUPR_OFF U(0xc) 15 #define PSYSR_OFF U(0x10) 16 17 #define PWKUPR_WEN BIT_32(31) 18 19 #define PSYSR_AFF_L2 BIT_32(31) 20 #define PSYSR_AFF_L1 BIT_32(30) 21 #define PSYSR_AFF_L0 BIT_32(29) 22 #define PSYSR_WEN BIT_32(28) 23 #define PSYSR_PC BIT_32(27) 24 #define PSYSR_PP BIT_32(26) 25 26 #define PSYSR_WK_SHIFT 24 27 #define PSYSR_WK_WIDTH 0x2 28 #define PSYSR_WK_MASK ((1U << PSYSR_WK_WIDTH) - 1U) 29 #define PSYSR_WK(x) ((x) >> PSYSR_WK_SHIFT) & PSYSR_WK_MASK 30 31 #define WKUP_COLD U(0x0) 32 #define WKUP_RESET U(0x1) 33 #define WKUP_PPONR U(0x2) 34 #define WKUP_GICREQ U(0x3) 35 36 #define PSYSR_INVALID U(0xffffffff) 37 38 #ifndef __ASSEMBLER__ 39 40 #include <stdint.h> 41 42 /******************************************************************************* 43 * Function & variable prototypes 44 ******************************************************************************/ 45 void fvp_pwrc_write_pcoffr(u_register_t mpidr); 46 void fvp_pwrc_write_ppoffr(u_register_t mpidr); 47 void fvp_pwrc_write_pponr(u_register_t mpidr); 48 void fvp_pwrc_set_wen(u_register_t mpidr); 49 void fvp_pwrc_clr_wen(u_register_t mpidr); 50 unsigned int fvp_pwrc_read_psysr(u_register_t mpidr); 51 unsigned int fvp_pwrc_get_cpu_wkr(u_register_t mpidr); 52 53 #endif /*__ASSEMBLER__*/ 54 55 #endif /* FVP_PWRC_H */ 56