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1#
2# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7
8N1SDP_BASE		:=	plat/arm/board/n1sdp
9
10INTERCONNECT_SOURCES	:=	${N1SDP_BASE}/n1sdp_interconnect.c
11
12PLAT_INCLUDES		:=	-I${N1SDP_BASE}/include
13
14
15N1SDP_CPU_SOURCES	:=	lib/cpus/aarch64/neoverse_n1.S
16
17# GIC-600 configuration
18GICV3_SUPPORT_GIC600		:=	1
19GICV3_IMPL_GIC600_MULTICHIP	:=	1
20
21# Include GICv3 driver files
22include drivers/arm/gic/v3/gicv3.mk
23
24N1SDP_GIC_SOURCES	:=	${GICV3_SOURCES}			\
25				plat/common/plat_gicv3.c		\
26				plat/arm/common/arm_gicv3.c		\
27
28PLAT_BL_COMMON_SOURCES	:=	${N1SDP_BASE}/n1sdp_plat.c	        \
29				${N1SDP_BASE}/aarch64/n1sdp_helper.S
30
31BL1_SOURCES		+=	drivers/arm/sbsa/sbsa.c
32
33BL31_SOURCES		:=	${N1SDP_CPU_SOURCES}			\
34				${INTERCONNECT_SOURCES}			\
35				${N1SDP_GIC_SOURCES}			\
36				${N1SDP_BASE}/n1sdp_bl31_setup.c	        \
37				${N1SDP_BASE}/n1sdp_topology.c	        \
38				${N1SDP_BASE}/n1sdp_security.c		\
39				drivers/arm/css/sds/sds.c
40
41FDT_SOURCES		+=	fdts/${PLAT}-single-chip.dts	\
42				fdts/${PLAT}-multi-chip.dts
43
44# TF-A not required to load the SCP Images
45override CSS_LOAD_SCP_IMAGES	  	:=	0
46
47# BL1/BL2 Image not a part of the capsule Image for n1sdp
48override NEED_BL1		  	:=	no
49override NEED_BL2		  	:=	no
50override NEED_BL2U		  	:=	no
51
52#TFA for n1sdp starts from BL31
53override RESET_TO_BL31            	:=	1
54
55# 32 bit mode not supported
56override CTX_INCLUDE_AARCH32_REGS 	:=	0
57
58override ARM_PLAT_MT              	:=	1
59
60# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
61# SCP during power management operations and for SCP RAM Firmware transfer.
62CSS_USE_SCMI_SDS_DRIVER		  	:=	1
63
64# System coherency is managed in hardware
65HW_ASSISTED_COHERENCY			:=	1
66
67# When building for systems with hardware-assisted coherency, there's no need to
68# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
69USE_COHERENT_MEM			:=	0
70
71# Enable the flag since N1SDP has a system level cache
72NEOVERSE_Nx_EXTERNAL_LLC		:=	1
73include plat/arm/common/arm_common.mk
74include plat/arm/css/common/css_common.mk
75include plat/arm/board/common/board_common.mk
76
77