1 /*
2 * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <plat/arm/common/plat_arm.h>
8 #include <plat/arm/css/common/css_pm.h>
9
10 /******************************************************************************
11 * The power domain tree descriptor.
12 ******************************************************************************/
13 const unsigned char tc0_pd_tree_desc[] = {
14 PLAT_ARM_CLUSTER_COUNT,
15 PLAT_MAX_CPUS_PER_CLUSTER,
16 };
17
18 /*******************************************************************************
19 * This function returns the topology tree information.
20 ******************************************************************************/
plat_get_power_domain_tree_desc(void)21 const unsigned char *plat_get_power_domain_tree_desc(void)
22 {
23 return tc0_pd_tree_desc;
24 }
25
26 /*******************************************************************************
27 * The array mapping platform core position (implemented by plat_my_core_pos())
28 * to the SCMI power domain ID implemented by SCP.
29 ******************************************************************************/
30 const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = {
31 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x0)),
32 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x1)),
33 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x2)),
34 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x3)),
35 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x4)),
36 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x5)),
37 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x6)),
38 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x7)),
39 };
40
41 /*******************************************************************************
42 * This function returns the core count within the cluster corresponding to
43 * `mpidr`.
44 ******************************************************************************/
plat_arm_get_cluster_core_count(u_register_t mpidr)45 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr)
46 {
47 return PLAT_MAX_CPUS_PER_CLUSTER;
48 }
49
50 #if ARM_PLAT_MT
51 /******************************************************************************
52 * Return the number of PE's supported by the CPU.
53 *****************************************************************************/
plat_arm_get_cpu_pe_count(u_register_t mpidr)54 unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr)
55 {
56 return PLAT_MAX_PE_PER_CPU;
57 }
58 #endif
59