1 /* 2 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <platform_def.h> 10 11 #include <arch.h> 12 #include <arch_helpers.h> 13 #include <common/bl_common.h> 14 15 #include "qemu_private.h" 16 17 /* Data structure which holds the extents of the trusted SRAM for BL1*/ 18 static meminfo_t bl1_tzram_layout; 19 20 bl1_plat_sec_mem_layout(void)21meminfo_t *bl1_plat_sec_mem_layout(void) 22 { 23 return &bl1_tzram_layout; 24 } 25 26 /******************************************************************************* 27 * Perform any BL1 specific platform actions. 28 ******************************************************************************/ bl1_early_platform_setup(void)29void bl1_early_platform_setup(void) 30 { 31 /* Initialize the console to provide early debug support */ 32 qemu_console_init(); 33 34 /* Allow BL1 to see the whole Trusted RAM */ 35 bl1_tzram_layout.total_base = BL_RAM_BASE; 36 bl1_tzram_layout.total_size = BL_RAM_SIZE; 37 } 38 39 /****************************************************************************** 40 * Perform the very early platform specific architecture setup. This only 41 * does basic initialization. Later architectural setup (bl1_arch_setup()) 42 * does not do anything platform specific. 43 *****************************************************************************/ 44 #ifdef __aarch64__ 45 #define QEMU_CONFIGURE_BL1_MMU(...) qemu_configure_mmu_el3(__VA_ARGS__) 46 #else 47 #define QEMU_CONFIGURE_BL1_MMU(...) qemu_configure_mmu_svc_mon(__VA_ARGS__) 48 #endif 49 bl1_plat_arch_setup(void)50void bl1_plat_arch_setup(void) 51 { 52 QEMU_CONFIGURE_BL1_MMU(bl1_tzram_layout.total_base, 53 bl1_tzram_layout.total_size, 54 BL_CODE_BASE, BL1_CODE_END, 55 BL1_RO_DATA_BASE, BL1_RO_DATA_END, 56 BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END); 57 } 58 bl1_platform_setup(void)59void bl1_platform_setup(void) 60 { 61 plat_qemu_io_setup(); 62 } 63