1 #include <gtest/gtest.h>
2
3 #include <cpuinfo.h>
4 #include <cpuinfo-mock.h>
5
6
TEST(PROCESSORS,count)7 TEST(PROCESSORS, count) {
8 ASSERT_EQ(8, cpuinfo_get_processors_count());
9 }
10
TEST(PROCESSORS,non_null)11 TEST(PROCESSORS, non_null) {
12 ASSERT_TRUE(cpuinfo_get_processors());
13 }
14
TEST(PROCESSORS,smt_id)15 TEST(PROCESSORS, smt_id) {
16 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
18 }
19 }
20
TEST(PROCESSORS,core)21 TEST(PROCESSORS, core) {
22 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
24 }
25 }
26
TEST(PROCESSORS,cluster)27 TEST(PROCESSORS, cluster) {
28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 switch (i) {
30 case 0:
31 case 1:
32 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster);
33 break;
34 case 2:
35 case 3:
36 case 4:
37 case 5:
38 case 6:
39 case 7:
40 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster);
41 break;
42 }
43 }
44 }
45
TEST(PROCESSORS,package)46 TEST(PROCESSORS, package) {
47 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
48 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
49 }
50 }
51
TEST(PROCESSORS,linux_id)52 TEST(PROCESSORS, linux_id) {
53 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
54 switch (i) {
55 case 0:
56 case 1:
57 ASSERT_EQ(i + 6, cpuinfo_get_processor(i)->linux_id);
58 break;
59 case 2:
60 case 3:
61 case 4:
62 case 5:
63 case 6:
64 case 7:
65 ASSERT_EQ(i - 2, cpuinfo_get_processor(i)->linux_id);
66 break;
67 }
68 }
69 }
70
TEST(PROCESSORS,l1i)71 TEST(PROCESSORS, l1i) {
72 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
73 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
74 }
75 }
76
TEST(PROCESSORS,l1d)77 TEST(PROCESSORS, l1d) {
78 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
79 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
80 }
81 }
82
TEST(PROCESSORS,l2)83 TEST(PROCESSORS, l2) {
84 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
85 switch (i) {
86 case 0:
87 case 1:
88 ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2);
89 break;
90 case 2:
91 case 3:
92 case 4:
93 case 5:
94 case 6:
95 case 7:
96 ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2);
97 break;
98 }
99 }
100 }
101
TEST(PROCESSORS,l3)102 TEST(PROCESSORS, l3) {
103 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
104 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
105 }
106 }
107
TEST(PROCESSORS,l4)108 TEST(PROCESSORS, l4) {
109 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
110 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
111 }
112 }
113
TEST(CORES,count)114 TEST(CORES, count) {
115 ASSERT_EQ(8, cpuinfo_get_cores_count());
116 }
117
TEST(CORES,non_null)118 TEST(CORES, non_null) {
119 ASSERT_TRUE(cpuinfo_get_cores());
120 }
121
TEST(CORES,processor_start)122 TEST(CORES, processor_start) {
123 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
124 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
125 }
126 }
127
TEST(CORES,processor_count)128 TEST(CORES, processor_count) {
129 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
130 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
131 }
132 }
133
TEST(CORES,core_id)134 TEST(CORES, core_id) {
135 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
136 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
137 }
138 }
139
TEST(CORES,cluster)140 TEST(CORES, cluster) {
141 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
142 switch (i) {
143 case 0:
144 case 1:
145 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster);
146 break;
147 case 2:
148 case 3:
149 case 4:
150 case 5:
151 case 6:
152 case 7:
153 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster);
154 break;
155 }
156 }
157 }
158
TEST(CORES,package)159 TEST(CORES, package) {
160 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
161 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
162 }
163 }
164
TEST(CORES,vendor)165 TEST(CORES, vendor) {
166 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
167 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
168 }
169 }
170
TEST(CORES,uarch)171 TEST(CORES, uarch) {
172 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
173 switch (i) {
174 case 0:
175 case 1:
176 ASSERT_EQ(cpuinfo_uarch_cortex_a73, cpuinfo_get_core(i)->uarch);
177 break;
178 case 2:
179 case 3:
180 case 4:
181 case 5:
182 case 6:
183 case 7:
184 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch);
185 break;
186 }
187 }
188 }
189
TEST(CORES,midr)190 TEST(CORES, midr) {
191 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
192 switch (i) {
193 case 0:
194 case 1:
195 ASSERT_EQ(UINT32_C(0x410FD092), cpuinfo_get_core(i)->midr);
196 break;
197 case 2:
198 case 3:
199 case 4:
200 case 5:
201 case 6:
202 case 7:
203 ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_core(i)->midr);
204 break;
205 }
206 }
207 }
208
TEST(CORES,DISABLED_frequency)209 TEST(CORES, DISABLED_frequency) {
210 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
211 switch (i) {
212 case 0:
213 case 1:
214 ASSERT_EQ(UINT64_C(2184000000), cpuinfo_get_core(i)->frequency);
215 break;
216 case 2:
217 case 3:
218 case 4:
219 case 5:
220 case 6:
221 case 7:
222 ASSERT_EQ(UINT64_C(1586000000), cpuinfo_get_core(i)->frequency);
223 break;
224 }
225 }
226 }
227
TEST(CLUSTERS,count)228 TEST(CLUSTERS, count) {
229 ASSERT_EQ(2, cpuinfo_get_clusters_count());
230 }
231
TEST(CLUSTERS,non_null)232 TEST(CLUSTERS, non_null) {
233 ASSERT_TRUE(cpuinfo_get_clusters());
234 }
235
TEST(CLUSTERS,processor_start)236 TEST(CLUSTERS, processor_start) {
237 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
238 switch (i) {
239 case 0:
240 ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start);
241 break;
242 case 1:
243 ASSERT_EQ(2, cpuinfo_get_cluster(i)->processor_start);
244 break;
245 }
246 }
247 }
248
TEST(CLUSTERS,processor_count)249 TEST(CLUSTERS, processor_count) {
250 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
251 switch (i) {
252 case 0:
253 ASSERT_EQ(2, cpuinfo_get_cluster(i)->processor_count);
254 break;
255 case 1:
256 ASSERT_EQ(6, cpuinfo_get_cluster(i)->processor_count);
257 break;
258 }
259 }
260 }
261
TEST(CLUSTERS,core_start)262 TEST(CLUSTERS, core_start) {
263 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
264 switch (i) {
265 case 0:
266 ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start);
267 break;
268 case 1:
269 ASSERT_EQ(2, cpuinfo_get_cluster(i)->core_start);
270 break;
271 }
272 }
273 }
274
TEST(CLUSTERS,core_count)275 TEST(CLUSTERS, core_count) {
276 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
277 switch (i) {
278 case 0:
279 ASSERT_EQ(2, cpuinfo_get_cluster(i)->core_count);
280 break;
281 case 1:
282 ASSERT_EQ(6, cpuinfo_get_cluster(i)->core_count);
283 break;
284 }
285 }
286 }
287
TEST(CLUSTERS,cluster_id)288 TEST(CLUSTERS, cluster_id) {
289 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
290 ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id);
291 }
292 }
293
TEST(CLUSTERS,package)294 TEST(CLUSTERS, package) {
295 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
296 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package);
297 }
298 }
299
TEST(CLUSTERS,vendor)300 TEST(CLUSTERS, vendor) {
301 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
302 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor);
303 }
304 }
305
TEST(CLUSTERS,uarch)306 TEST(CLUSTERS, uarch) {
307 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
308 switch (i) {
309 case 0:
310 ASSERT_EQ(cpuinfo_uarch_cortex_a73, cpuinfo_get_cluster(i)->uarch);
311 break;
312 case 1:
313 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_cluster(i)->uarch);
314 break;
315 }
316 }
317 }
318
TEST(CLUSTERS,midr)319 TEST(CLUSTERS, midr) {
320 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
321 switch (i) {
322 case 0:
323 ASSERT_EQ(UINT32_C(0x410FD092), cpuinfo_get_cluster(i)->midr);
324 break;
325 case 1:
326 ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_cluster(i)->midr);
327 break;
328 }
329 }
330 }
331
TEST(CLUSTERS,DISABLED_frequency)332 TEST(CLUSTERS, DISABLED_frequency) {
333 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
334 switch (i) {
335 case 0:
336 ASSERT_EQ(UINT64_C(2184000000), cpuinfo_get_cluster(i)->frequency);
337 break;
338 case 1:
339 ASSERT_EQ(UINT64_C(1586000000), cpuinfo_get_cluster(i)->frequency);
340 break;
341 }
342 }
343 }
344
TEST(PACKAGES,count)345 TEST(PACKAGES, count) {
346 ASSERT_EQ(1, cpuinfo_get_packages_count());
347 }
348
TEST(PACKAGES,name)349 TEST(PACKAGES, name) {
350 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
351 ASSERT_EQ("Samsung Exynos 7885",
352 std::string(cpuinfo_get_package(i)->name,
353 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
354 }
355 }
356
TEST(PACKAGES,processor_start)357 TEST(PACKAGES, processor_start) {
358 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
359 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
360 }
361 }
362
TEST(PACKAGES,processor_count)363 TEST(PACKAGES, processor_count) {
364 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
365 ASSERT_EQ(8, cpuinfo_get_package(i)->processor_count);
366 }
367 }
368
TEST(PACKAGES,core_start)369 TEST(PACKAGES, core_start) {
370 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
371 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
372 }
373 }
374
TEST(PACKAGES,core_count)375 TEST(PACKAGES, core_count) {
376 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
377 ASSERT_EQ(8, cpuinfo_get_package(i)->core_count);
378 }
379 }
380
TEST(PACKAGES,cluster_start)381 TEST(PACKAGES, cluster_start) {
382 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
383 ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start);
384 }
385 }
386
TEST(PACKAGES,cluster_count)387 TEST(PACKAGES, cluster_count) {
388 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
389 ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count);
390 }
391 }
392
TEST(ISA,thumb)393 TEST(ISA, thumb) {
394 #if CPUINFO_ARCH_ARM
395 ASSERT_TRUE(cpuinfo_has_arm_thumb());
396 #elif CPUINFO_ARCH_ARM64
397 ASSERT_FALSE(cpuinfo_has_arm_thumb());
398 #endif
399 }
400
TEST(ISA,thumb2)401 TEST(ISA, thumb2) {
402 #if CPUINFO_ARCH_ARM
403 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
404 #elif CPUINFO_ARCH_ARM64
405 ASSERT_FALSE(cpuinfo_has_arm_thumb2());
406 #endif
407 }
408
TEST(ISA,armv5e)409 TEST(ISA, armv5e) {
410 #if CPUINFO_ARCH_ARM
411 ASSERT_TRUE(cpuinfo_has_arm_v5e());
412 #elif CPUINFO_ARCH_ARM64
413 ASSERT_FALSE(cpuinfo_has_arm_v5e());
414 #endif
415 }
416
TEST(ISA,armv6)417 TEST(ISA, armv6) {
418 #if CPUINFO_ARCH_ARM
419 ASSERT_TRUE(cpuinfo_has_arm_v6());
420 #elif CPUINFO_ARCH_ARM64
421 ASSERT_FALSE(cpuinfo_has_arm_v6());
422 #endif
423 }
424
TEST(ISA,armv6k)425 TEST(ISA, armv6k) {
426 #if CPUINFO_ARCH_ARM
427 ASSERT_TRUE(cpuinfo_has_arm_v6k());
428 #elif CPUINFO_ARCH_ARM64
429 ASSERT_FALSE(cpuinfo_has_arm_v6k());
430 #endif
431 }
432
TEST(ISA,armv7)433 TEST(ISA, armv7) {
434 #if CPUINFO_ARCH_ARM
435 ASSERT_TRUE(cpuinfo_has_arm_v7());
436 #elif CPUINFO_ARCH_ARM64
437 ASSERT_FALSE(cpuinfo_has_arm_v7());
438 #endif
439 }
440
TEST(ISA,armv7mp)441 TEST(ISA, armv7mp) {
442 #if CPUINFO_ARCH_ARM
443 ASSERT_TRUE(cpuinfo_has_arm_v7mp());
444 #elif CPUINFO_ARCH_ARM64
445 ASSERT_FALSE(cpuinfo_has_arm_v7mp());
446 #endif
447 }
448
TEST(ISA,idiv)449 TEST(ISA, idiv) {
450 ASSERT_TRUE(cpuinfo_has_arm_idiv());
451 }
452
TEST(ISA,vfpv2)453 TEST(ISA, vfpv2) {
454 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
455 }
456
TEST(ISA,vfpv3)457 TEST(ISA, vfpv3) {
458 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
459 }
460
TEST(ISA,vfpv3_d32)461 TEST(ISA, vfpv3_d32) {
462 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
463 }
464
TEST(ISA,vfpv3_fp16)465 TEST(ISA, vfpv3_fp16) {
466 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
467 }
468
TEST(ISA,vfpv3_fp16_d32)469 TEST(ISA, vfpv3_fp16_d32) {
470 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
471 }
472
TEST(ISA,vfpv4)473 TEST(ISA, vfpv4) {
474 ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
475 }
476
TEST(ISA,vfpv4_d32)477 TEST(ISA, vfpv4_d32) {
478 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
479 }
480
TEST(ISA,wmmx)481 TEST(ISA, wmmx) {
482 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
483 }
484
TEST(ISA,wmmx2)485 TEST(ISA, wmmx2) {
486 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
487 }
488
TEST(ISA,neon)489 TEST(ISA, neon) {
490 ASSERT_TRUE(cpuinfo_has_arm_neon());
491 }
492
TEST(ISA,neon_fp16)493 TEST(ISA, neon_fp16) {
494 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
495 }
496
TEST(ISA,neon_fma)497 TEST(ISA, neon_fma) {
498 ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
499 }
500
TEST(ISA,atomics)501 TEST(ISA, atomics) {
502 ASSERT_FALSE(cpuinfo_has_arm_atomics());
503 }
504
TEST(ISA,neon_rdm)505 TEST(ISA, neon_rdm) {
506 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
507 }
508
TEST(ISA,fp16_arith)509 TEST(ISA, fp16_arith) {
510 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
511 }
512
TEST(ISA,neon_fp16_arith)513 TEST(ISA, neon_fp16_arith) {
514 ASSERT_FALSE(cpuinfo_has_arm_neon_fp16_arith());
515 }
516
TEST(ISA,neon_dot)517 TEST(ISA, neon_dot) {
518 ASSERT_FALSE(cpuinfo_has_arm_neon_dot());
519 }
520
TEST(ISA,jscvt)521 TEST(ISA, jscvt) {
522 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
523 }
524
TEST(ISA,fcma)525 TEST(ISA, fcma) {
526 ASSERT_FALSE(cpuinfo_has_arm_fcma());
527 }
528
TEST(ISA,aes)529 TEST(ISA, aes) {
530 ASSERT_TRUE(cpuinfo_has_arm_aes());
531 }
532
TEST(ISA,sha1)533 TEST(ISA, sha1) {
534 ASSERT_TRUE(cpuinfo_has_arm_sha1());
535 }
536
TEST(ISA,sha2)537 TEST(ISA, sha2) {
538 ASSERT_TRUE(cpuinfo_has_arm_sha2());
539 }
540
TEST(ISA,pmull)541 TEST(ISA, pmull) {
542 ASSERT_TRUE(cpuinfo_has_arm_pmull());
543 }
544
TEST(ISA,crc32)545 TEST(ISA, crc32) {
546 ASSERT_TRUE(cpuinfo_has_arm_crc32());
547 }
548
TEST(L1I,count)549 TEST(L1I, count) {
550 ASSERT_EQ(8, cpuinfo_get_l1i_caches_count());
551 }
552
TEST(L1I,non_null)553 TEST(L1I, non_null) {
554 ASSERT_TRUE(cpuinfo_get_l1i_caches());
555 }
556
TEST(L1I,size)557 TEST(L1I, size) {
558 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
559 switch (i) {
560 case 0:
561 case 1:
562 ASSERT_EQ(64 * 1024, cpuinfo_get_l1i_cache(i)->size);
563 break;
564 case 2:
565 case 3:
566 case 4:
567 case 5:
568 case 6:
569 case 7:
570 ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size);
571 break;
572 }
573 }
574 }
575
TEST(L1I,associativity)576 TEST(L1I, associativity) {
577 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
578 switch (i) {
579 case 0:
580 case 1:
581 ASSERT_EQ(4, cpuinfo_get_l1i_cache(i)->associativity);
582 break;
583 case 2:
584 case 3:
585 case 4:
586 case 5:
587 case 6:
588 case 7:
589 ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity);
590 break;
591 }
592 }
593 }
594
TEST(L1I,sets)595 TEST(L1I, sets) {
596 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
597 ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size,
598 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
599 }
600 }
601
TEST(L1I,partitions)602 TEST(L1I, partitions) {
603 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
604 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
605 }
606 }
607
TEST(L1I,line_size)608 TEST(L1I, line_size) {
609 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
610 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
611 }
612 }
613
TEST(L1I,flags)614 TEST(L1I, flags) {
615 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
616 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
617 }
618 }
619
TEST(L1I,processors)620 TEST(L1I, processors) {
621 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
622 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
623 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
624 }
625 }
626
TEST(L1D,count)627 TEST(L1D, count) {
628 ASSERT_EQ(8, cpuinfo_get_l1d_caches_count());
629 }
630
TEST(L1D,non_null)631 TEST(L1D, non_null) {
632 ASSERT_TRUE(cpuinfo_get_l1d_caches());
633 }
634
TEST(L1D,size)635 TEST(L1D, size) {
636 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
637 ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size);
638 }
639 }
640
TEST(L1D,associativity)641 TEST(L1D, associativity) {
642 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
643 switch (i) {
644 case 0:
645 case 1:
646 ASSERT_EQ(8, cpuinfo_get_l1d_cache(i)->associativity);
647 break;
648 case 2:
649 case 3:
650 case 4:
651 case 5:
652 case 6:
653 case 7:
654 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
655 break;
656 }
657 }
658 }
659
TEST(L1D,sets)660 TEST(L1D, sets) {
661 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
662 ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size,
663 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
664 }
665 }
666
TEST(L1D,partitions)667 TEST(L1D, partitions) {
668 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
669 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
670 }
671 }
672
TEST(L1D,line_size)673 TEST(L1D, line_size) {
674 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
675 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
676 }
677 }
678
TEST(L1D,flags)679 TEST(L1D, flags) {
680 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
681 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
682 }
683 }
684
TEST(L1D,processors)685 TEST(L1D, processors) {
686 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
687 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
688 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
689 }
690 }
691
TEST(L2,count)692 TEST(L2, count) {
693 ASSERT_EQ(2, cpuinfo_get_l2_caches_count());
694 }
695
TEST(L2,non_null)696 TEST(L2, non_null) {
697 ASSERT_TRUE(cpuinfo_get_l2_caches());
698 }
699
TEST(L2,size)700 TEST(L2, size) {
701 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
702 switch (i) {
703 case 0:
704 ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size);
705 break;
706 case 1:
707 ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size);
708 break;
709 }
710 }
711 }
712
TEST(L2,associativity)713 TEST(L2, associativity) {
714 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
715 ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity);
716 }
717 }
718
TEST(L2,sets)719 TEST(L2, sets) {
720 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
721 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
722 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
723 }
724 }
725
TEST(L2,partitions)726 TEST(L2, partitions) {
727 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
728 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
729 }
730 }
731
TEST(L2,line_size)732 TEST(L2, line_size) {
733 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
734 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
735 }
736 }
737
TEST(L2,flags)738 TEST(L2, flags) {
739 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
740 switch (i) {
741 case 0:
742 ASSERT_EQ(CPUINFO_CACHE_INCLUSIVE, cpuinfo_get_l2_cache(i)->flags);
743 break;
744 case 1:
745 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
746 break;
747 }
748 }
749 }
750
TEST(L2,processors)751 TEST(L2, processors) {
752 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
753 switch (i) {
754 case 0:
755 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start);
756 ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_count);
757 break;
758 case 1:
759 ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_start);
760 ASSERT_EQ(6, cpuinfo_get_l2_cache(i)->processor_count);
761 break;
762 }
763 }
764 }
765
TEST(L3,none)766 TEST(L3, none) {
767 ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
768 ASSERT_FALSE(cpuinfo_get_l3_caches());
769 }
770
TEST(L4,none)771 TEST(L4, none) {
772 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
773 ASSERT_FALSE(cpuinfo_get_l4_caches());
774 }
775
776 #include <galaxy-a8-2018.h>
777
main(int argc,char * argv[])778 int main(int argc, char* argv[]) {
779 #if CPUINFO_ARCH_ARM
780 cpuinfo_set_hwcap(UINT32_C(0x0037B0D6));
781 cpuinfo_set_hwcap2(UINT32_C(0x0000001F));
782 #elif CPUINFO_ARCH_ARM64
783 cpuinfo_set_hwcap(UINT32_C(0x000000FF));
784 #endif
785 cpuinfo_mock_filesystem(filesystem);
786 #ifdef __ANDROID__
787 cpuinfo_mock_android_properties(properties);
788 #endif
789 cpuinfo_initialize();
790 ::testing::InitGoogleTest(&argc, argv);
791 return RUN_ALL_TESTS();
792 }
793