1 #include <gtest/gtest.h>
2
3 #include <cpuinfo.h>
4 #include <cpuinfo-mock.h>
5
6
TEST(PROCESSORS,count)7 TEST(PROCESSORS, count) {
8 ASSERT_EQ(8, cpuinfo_get_processors_count());
9 }
10
TEST(PROCESSORS,non_null)11 TEST(PROCESSORS, non_null) {
12 ASSERT_TRUE(cpuinfo_get_processors());
13 }
14
TEST(PROCESSORS,smt_id)15 TEST(PROCESSORS, smt_id) {
16 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
18 }
19 }
20
TEST(PROCESSORS,core)21 TEST(PROCESSORS, core) {
22 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
24 }
25 }
26
TEST(PROCESSORS,cluster)27 TEST(PROCESSORS, cluster) {
28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 switch (i) {
30 case 0:
31 case 1:
32 case 2:
33 case 3:
34 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster);
35 break;
36 case 4:
37 case 5:
38 case 6:
39 case 7:
40 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster);
41 break;
42 }
43 }
44 }
45
TEST(PROCESSORS,package)46 TEST(PROCESSORS, package) {
47 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
48 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
49 }
50 }
51
TEST(PROCESSORS,linux_id)52 TEST(PROCESSORS, linux_id) {
53 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
54 switch (i) {
55 case 0:
56 case 1:
57 case 2:
58 case 3:
59 ASSERT_EQ(i + 4, cpuinfo_get_processor(i)->linux_id);
60 break;
61 case 4:
62 case 5:
63 case 6:
64 case 7:
65 ASSERT_EQ(i - 4, cpuinfo_get_processor(i)->linux_id);
66 break;
67 }
68 }
69 }
70
TEST(PROCESSORS,l1i)71 TEST(PROCESSORS, l1i) {
72 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
73 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
74 }
75 }
76
TEST(PROCESSORS,l1d)77 TEST(PROCESSORS, l1d) {
78 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
79 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
80 }
81 }
82
TEST(PROCESSORS,l2)83 TEST(PROCESSORS, l2) {
84 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
85 switch (i) {
86 case 0:
87 case 1:
88 case 2:
89 case 3:
90 ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2);
91 break;
92 case 4:
93 case 5:
94 case 6:
95 case 7:
96 ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2);
97 break;
98 }
99 }
100 }
101
TEST(PROCESSORS,l3)102 TEST(PROCESSORS, l3) {
103 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
104 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
105 }
106 }
107
TEST(PROCESSORS,l4)108 TEST(PROCESSORS, l4) {
109 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
110 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
111 }
112 }
113
TEST(CORES,count)114 TEST(CORES, count) {
115 ASSERT_EQ(8, cpuinfo_get_cores_count());
116 }
117
TEST(CORES,non_null)118 TEST(CORES, non_null) {
119 ASSERT_TRUE(cpuinfo_get_cores());
120 }
121
TEST(CORES,processor_start)122 TEST(CORES, processor_start) {
123 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
124 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
125 }
126 }
127
TEST(CORES,processor_count)128 TEST(CORES, processor_count) {
129 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
130 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
131 }
132 }
133
TEST(CORES,core_id)134 TEST(CORES, core_id) {
135 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
136 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
137 }
138 }
139
TEST(CORES,cluster)140 TEST(CORES, cluster) {
141 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
142 switch (i) {
143 case 0:
144 case 1:
145 case 2:
146 case 3:
147 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster);
148 break;
149 case 4:
150 case 5:
151 case 6:
152 case 7:
153 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster);
154 break;
155 }
156 }
157 }
158
TEST(CORES,package)159 TEST(CORES, package) {
160 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
161 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
162 }
163 }
164
TEST(CORES,vendor)165 TEST(CORES, vendor) {
166 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
167 switch (i) {
168 case 0:
169 case 1:
170 case 2:
171 case 3:
172 ASSERT_EQ(cpuinfo_vendor_samsung, cpuinfo_get_core(i)->vendor);
173 break;
174 case 4:
175 case 5:
176 case 6:
177 case 7:
178 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
179 break;
180 }
181 }
182 }
183
TEST(CORES,uarch)184 TEST(CORES, uarch) {
185 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
186 switch (i) {
187 case 0:
188 case 1:
189 case 2:
190 case 3:
191 ASSERT_EQ(cpuinfo_uarch_exynos_m1, cpuinfo_get_core(i)->uarch);
192 break;
193 case 4:
194 case 5:
195 case 6:
196 case 7:
197 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch);
198 break;
199 }
200 }
201 }
202
TEST(CORES,midr)203 TEST(CORES, midr) {
204 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
205 switch (i) {
206 case 0:
207 case 1:
208 case 2:
209 case 3:
210 ASSERT_EQ(UINT32_C(0x531F0011), cpuinfo_get_core(i)->midr);
211 break;
212 case 4:
213 case 5:
214 case 6:
215 case 7:
216 ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_core(i)->midr);
217 break;
218 }
219 }
220 }
221
TEST(CORES,DISABLED_frequency)222 TEST(CORES, DISABLED_frequency) {
223 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
224 switch (i) {
225 case 0:
226 case 1:
227 case 2:
228 case 3:
229 ASSERT_EQ(UINT64_C(2600000000), cpuinfo_get_core(i)->frequency);
230 break;
231 case 4:
232 case 5:
233 case 6:
234 case 7:
235 ASSERT_EQ(UINT64_C(1586000000), cpuinfo_get_core(i)->frequency);
236 break;
237 }
238 }
239 }
240
TEST(CLUSTERS,count)241 TEST(CLUSTERS, count) {
242 ASSERT_EQ(2, cpuinfo_get_clusters_count());
243 }
244
TEST(CLUSTERS,non_null)245 TEST(CLUSTERS, non_null) {
246 ASSERT_TRUE(cpuinfo_get_clusters());
247 }
248
TEST(CLUSTERS,processor_start)249 TEST(CLUSTERS, processor_start) {
250 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
251 switch (i) {
252 case 0:
253 ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start);
254 break;
255 case 1:
256 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_start);
257 break;
258 }
259 }
260 }
261
TEST(CLUSTERS,processor_count)262 TEST(CLUSTERS, processor_count) {
263 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
264 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count);
265 }
266 }
267
TEST(CLUSTERS,core_start)268 TEST(CLUSTERS, core_start) {
269 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
270 switch (i) {
271 case 0:
272 ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start);
273 break;
274 case 1:
275 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_start);
276 break;
277 }
278 }
279 }
280
TEST(CLUSTERS,core_count)281 TEST(CLUSTERS, core_count) {
282 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
283 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count);
284 }
285 }
286
TEST(CLUSTERS,cluster_id)287 TEST(CLUSTERS, cluster_id) {
288 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
289 ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id);
290 }
291 }
292
TEST(CLUSTERS,package)293 TEST(CLUSTERS, package) {
294 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
295 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package);
296 }
297 }
298
TEST(CLUSTERS,vendor)299 TEST(CLUSTERS, vendor) {
300 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
301 switch (i) {
302 case 0:
303 ASSERT_EQ(cpuinfo_vendor_samsung, cpuinfo_get_cluster(i)->vendor);
304 break;
305 case 1:
306 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor);
307 break;
308 }
309 }
310 }
311
TEST(CLUSTERS,uarch)312 TEST(CLUSTERS, uarch) {
313 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
314 switch (i) {
315 case 0:
316 ASSERT_EQ(cpuinfo_uarch_exynos_m1, cpuinfo_get_cluster(i)->uarch);
317 break;
318 case 1:
319 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_cluster(i)->uarch);
320 break;
321 }
322 }
323 }
324
TEST(CLUSTERS,midr)325 TEST(CLUSTERS, midr) {
326 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
327 switch (i) {
328 case 0:
329 ASSERT_EQ(UINT32_C(0x531F0011), cpuinfo_get_cluster(i)->midr);
330 break;
331 case 1:
332 ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_cluster(i)->midr);
333 break;
334 }
335 }
336 }
337
TEST(CLUSTERS,DISABLED_frequency)338 TEST(CLUSTERS, DISABLED_frequency) {
339 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
340 switch (i) {
341 case 0:
342 ASSERT_EQ(UINT64_C(2600000000), cpuinfo_get_cluster(i)->frequency);
343 break;
344 case 1:
345 ASSERT_EQ(UINT64_C(1586000000), cpuinfo_get_cluster(i)->frequency);
346 break;
347 }
348 }
349 }
350
TEST(PACKAGES,count)351 TEST(PACKAGES, count) {
352 ASSERT_EQ(1, cpuinfo_get_packages_count());
353 }
354
TEST(PACKAGES,name)355 TEST(PACKAGES, name) {
356 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
357 ASSERT_EQ("Samsung Exynos 8890",
358 std::string(cpuinfo_get_package(i)->name,
359 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
360 }
361 }
362
TEST(PACKAGES,processor_start)363 TEST(PACKAGES, processor_start) {
364 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
365 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
366 }
367 }
368
TEST(PACKAGES,processor_count)369 TEST(PACKAGES, processor_count) {
370 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
371 ASSERT_EQ(8, cpuinfo_get_package(i)->processor_count);
372 }
373 }
374
TEST(PACKAGES,core_start)375 TEST(PACKAGES, core_start) {
376 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
377 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
378 }
379 }
380
TEST(PACKAGES,core_count)381 TEST(PACKAGES, core_count) {
382 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
383 ASSERT_EQ(8, cpuinfo_get_package(i)->core_count);
384 }
385 }
386
TEST(PACKAGES,cluster_start)387 TEST(PACKAGES, cluster_start) {
388 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
389 ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start);
390 }
391 }
392
TEST(PACKAGES,cluster_count)393 TEST(PACKAGES, cluster_count) {
394 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
395 ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count);
396 }
397 }
398
TEST(ISA,thumb)399 TEST(ISA, thumb) {
400 #if CPUINFO_ARCH_ARM
401 ASSERT_TRUE(cpuinfo_has_arm_thumb());
402 #elif CPUINFO_ARCH_ARM64
403 ASSERT_FALSE(cpuinfo_has_arm_thumb());
404 #endif
405 }
406
TEST(ISA,thumb2)407 TEST(ISA, thumb2) {
408 #if CPUINFO_ARCH_ARM
409 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
410 #elif CPUINFO_ARCH_ARM64
411 ASSERT_FALSE(cpuinfo_has_arm_thumb2());
412 #endif
413 }
414
TEST(ISA,armv5e)415 TEST(ISA, armv5e) {
416 #if CPUINFO_ARCH_ARM
417 ASSERT_TRUE(cpuinfo_has_arm_v5e());
418 #elif CPUINFO_ARCH_ARM64
419 ASSERT_FALSE(cpuinfo_has_arm_v5e());
420 #endif
421 }
422
TEST(ISA,armv6)423 TEST(ISA, armv6) {
424 #if CPUINFO_ARCH_ARM
425 ASSERT_TRUE(cpuinfo_has_arm_v6());
426 #elif CPUINFO_ARCH_ARM64
427 ASSERT_FALSE(cpuinfo_has_arm_v6());
428 #endif
429 }
430
TEST(ISA,armv6k)431 TEST(ISA, armv6k) {
432 #if CPUINFO_ARCH_ARM
433 ASSERT_TRUE(cpuinfo_has_arm_v6k());
434 #elif CPUINFO_ARCH_ARM64
435 ASSERT_FALSE(cpuinfo_has_arm_v6k());
436 #endif
437 }
438
TEST(ISA,armv7)439 TEST(ISA, armv7) {
440 #if CPUINFO_ARCH_ARM
441 ASSERT_TRUE(cpuinfo_has_arm_v7());
442 #elif CPUINFO_ARCH_ARM64
443 ASSERT_FALSE(cpuinfo_has_arm_v7());
444 #endif
445 }
446
TEST(ISA,armv7mp)447 TEST(ISA, armv7mp) {
448 #if CPUINFO_ARCH_ARM
449 ASSERT_TRUE(cpuinfo_has_arm_v7mp());
450 #elif CPUINFO_ARCH_ARM64
451 ASSERT_FALSE(cpuinfo_has_arm_v7mp());
452 #endif
453 }
454
TEST(ISA,idiv)455 TEST(ISA, idiv) {
456 ASSERT_TRUE(cpuinfo_has_arm_idiv());
457 }
458
TEST(ISA,vfpv2)459 TEST(ISA, vfpv2) {
460 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
461 }
462
TEST(ISA,vfpv3)463 TEST(ISA, vfpv3) {
464 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
465 }
466
TEST(ISA,vfpv3_d32)467 TEST(ISA, vfpv3_d32) {
468 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
469 }
470
TEST(ISA,vfpv3_fp16)471 TEST(ISA, vfpv3_fp16) {
472 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
473 }
474
TEST(ISA,vfpv3_fp16_d32)475 TEST(ISA, vfpv3_fp16_d32) {
476 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
477 }
478
TEST(ISA,vfpv4)479 TEST(ISA, vfpv4) {
480 ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
481 }
482
TEST(ISA,vfpv4_d32)483 TEST(ISA, vfpv4_d32) {
484 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
485 }
486
TEST(ISA,wmmx)487 TEST(ISA, wmmx) {
488 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
489 }
490
TEST(ISA,wmmx2)491 TEST(ISA, wmmx2) {
492 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
493 }
494
TEST(ISA,neon)495 TEST(ISA, neon) {
496 ASSERT_TRUE(cpuinfo_has_arm_neon());
497 }
498
TEST(ISA,neon_fp16)499 TEST(ISA, neon_fp16) {
500 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
501 }
502
TEST(ISA,neon_fma)503 TEST(ISA, neon_fma) {
504 ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
505 }
506
TEST(ISA,atomics)507 TEST(ISA, atomics) {
508 ASSERT_FALSE(cpuinfo_has_arm_atomics());
509 }
510
TEST(ISA,neon_rdm)511 TEST(ISA, neon_rdm) {
512 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
513 }
514
TEST(ISA,fp16_arith)515 TEST(ISA, fp16_arith) {
516 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
517 }
518
TEST(ISA,neon_fp16_arith)519 TEST(ISA, neon_fp16_arith) {
520 ASSERT_FALSE(cpuinfo_has_arm_neon_fp16_arith());
521 }
522
TEST(ISA,neon_dot)523 TEST(ISA, neon_dot) {
524 ASSERT_FALSE(cpuinfo_has_arm_neon_dot());
525 }
526
TEST(ISA,jscvt)527 TEST(ISA, jscvt) {
528 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
529 }
530
TEST(ISA,fcma)531 TEST(ISA, fcma) {
532 ASSERT_FALSE(cpuinfo_has_arm_fcma());
533 }
534
TEST(ISA,aes)535 TEST(ISA, aes) {
536 ASSERT_TRUE(cpuinfo_has_arm_aes());
537 }
538
TEST(ISA,sha1)539 TEST(ISA, sha1) {
540 ASSERT_TRUE(cpuinfo_has_arm_sha1());
541 }
542
TEST(ISA,sha2)543 TEST(ISA, sha2) {
544 ASSERT_TRUE(cpuinfo_has_arm_sha2());
545 }
546
TEST(ISA,pmull)547 TEST(ISA, pmull) {
548 ASSERT_TRUE(cpuinfo_has_arm_pmull());
549 }
550
TEST(ISA,crc32)551 TEST(ISA, crc32) {
552 ASSERT_TRUE(cpuinfo_has_arm_crc32());
553 }
554
TEST(L1I,count)555 TEST(L1I, count) {
556 ASSERT_EQ(8, cpuinfo_get_l1i_caches_count());
557 }
558
TEST(L1I,non_null)559 TEST(L1I, non_null) {
560 ASSERT_TRUE(cpuinfo_get_l1i_caches());
561 }
562
TEST(L1I,size)563 TEST(L1I, size) {
564 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
565 switch (i) {
566 case 0:
567 case 1:
568 case 2:
569 case 3:
570 ASSERT_EQ(64 * 1024, cpuinfo_get_l1i_cache(i)->size);
571 break;
572 case 4:
573 case 5:
574 case 6:
575 case 7:
576 ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size);
577 break;
578 }
579 }
580 }
581
TEST(L1I,associativity)582 TEST(L1I, associativity) {
583 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
584 switch (i) {
585 case 0:
586 case 1:
587 case 2:
588 case 3:
589 ASSERT_EQ(4, cpuinfo_get_l1i_cache(i)->associativity);
590 break;
591 case 4:
592 case 5:
593 case 6:
594 case 7:
595 ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity);
596 break;
597 }
598 }
599 }
600
TEST(L1I,sets)601 TEST(L1I, sets) {
602 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
603 ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size,
604 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
605 }
606 }
607
TEST(L1I,partitions)608 TEST(L1I, partitions) {
609 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
610 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
611 }
612 }
613
TEST(L1I,line_size)614 TEST(L1I, line_size) {
615 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
616 switch (i) {
617 case 0:
618 case 1:
619 case 2:
620 case 3:
621 ASSERT_EQ(128, cpuinfo_get_l1i_cache(i)->line_size);
622 break;
623 case 4:
624 case 5:
625 case 6:
626 case 7:
627 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
628 break;
629 }
630 }
631 }
632
TEST(L1I,flags)633 TEST(L1I, flags) {
634 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
635 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
636 }
637 }
638
TEST(L1I,processors)639 TEST(L1I, processors) {
640 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
641 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
642 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
643 }
644 }
645
TEST(L1D,count)646 TEST(L1D, count) {
647 ASSERT_EQ(8, cpuinfo_get_l1d_caches_count());
648 }
649
TEST(L1D,non_null)650 TEST(L1D, non_null) {
651 ASSERT_TRUE(cpuinfo_get_l1d_caches());
652 }
653
TEST(L1D,size)654 TEST(L1D, size) {
655 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
656 ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size);
657 }
658 }
659
TEST(L1D,associativity)660 TEST(L1D, associativity) {
661 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
662 switch (i) {
663 case 0:
664 case 1:
665 case 2:
666 case 3:
667 ASSERT_EQ(8, cpuinfo_get_l1d_cache(i)->associativity);
668 break;
669 case 4:
670 case 5:
671 case 6:
672 case 7:
673 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
674 break;
675 }
676 }
677 }
678
TEST(L1D,sets)679 TEST(L1D, sets) {
680 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
681 ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size,
682 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
683 }
684 }
685
TEST(L1D,partitions)686 TEST(L1D, partitions) {
687 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
688 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
689 }
690 }
691
TEST(L1D,line_size)692 TEST(L1D, line_size) {
693 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
694 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
695 }
696 }
697
TEST(L1D,flags)698 TEST(L1D, flags) {
699 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
700 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
701 }
702 }
703
TEST(L1D,processors)704 TEST(L1D, processors) {
705 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
706 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
707 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
708 }
709 }
710
TEST(L2,count)711 TEST(L2, count) {
712 ASSERT_EQ(2, cpuinfo_get_l2_caches_count());
713 }
714
TEST(L2,non_null)715 TEST(L2, non_null) {
716 ASSERT_TRUE(cpuinfo_get_l2_caches());
717 }
718
TEST(L2,size)719 TEST(L2, size) {
720 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
721 switch (i) {
722 case 0:
723 ASSERT_EQ(2 * 1024 * 1024, cpuinfo_get_l2_cache(i)->size);
724 break;
725 case 1:
726 ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size);
727 break;
728 }
729 }
730 }
731
TEST(L2,associativity)732 TEST(L2, associativity) {
733 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
734 ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity);
735 }
736 }
737
TEST(L2,sets)738 TEST(L2, sets) {
739 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
740 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
741 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
742 }
743 }
744
TEST(L2,partitions)745 TEST(L2, partitions) {
746 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
747 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
748 }
749 }
750
TEST(L2,line_size)751 TEST(L2, line_size) {
752 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
753 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
754 }
755 }
756
TEST(L2,flags)757 TEST(L2, flags) {
758 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
759 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
760 }
761 }
762
TEST(L2,processors)763 TEST(L2, processors) {
764 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
765 switch (i) {
766 case 0:
767 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start);
768 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
769 break;
770 case 1:
771 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_start);
772 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
773 break;
774 }
775 }
776 }
777
TEST(L3,none)778 TEST(L3, none) {
779 ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
780 ASSERT_FALSE(cpuinfo_get_l3_caches());
781 }
782
TEST(L4,none)783 TEST(L4, none) {
784 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
785 ASSERT_FALSE(cpuinfo_get_l4_caches());
786 }
787
788 #include <galaxy-s7-global.h>
789
main(int argc,char * argv[])790 int main(int argc, char* argv[]) {
791 #if CPUINFO_ARCH_ARM
792 cpuinfo_set_hwcap(UINT32_C(0x0037B0D6));
793 cpuinfo_set_hwcap2(UINT32_C(0x0000001F));
794 #elif CPUINFO_ARCH_ARM64
795 cpuinfo_set_hwcap(UINT32_C(0x000000FF));
796 #endif
797 cpuinfo_mock_filesystem(filesystem);
798 #ifdef __ANDROID__
799 cpuinfo_mock_android_properties(properties);
800 #endif
801 cpuinfo_initialize();
802 ::testing::InitGoogleTest(&argc, argv);
803 return RUN_ALL_TESTS();
804 }