1 #include <gtest/gtest.h>
2
3 #include <cpuinfo.h>
4 #include <cpuinfo-mock.h>
5
6
TEST(PROCESSORS,count)7 TEST(PROCESSORS, count) {
8 ASSERT_EQ(8, cpuinfo_get_processors_count());
9 }
10
TEST(PROCESSORS,non_null)11 TEST(PROCESSORS, non_null) {
12 ASSERT_TRUE(cpuinfo_get_processors());
13 }
14
TEST(PROCESSORS,smt_id)15 TEST(PROCESSORS, smt_id) {
16 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
18 }
19 }
20
TEST(PROCESSORS,core)21 TEST(PROCESSORS, core) {
22 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
24 }
25 }
26
TEST(PROCESSORS,cluster)27 TEST(PROCESSORS, cluster) {
28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 switch (i) {
30 case 0:
31 case 1:
32 case 2:
33 case 3:
34 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster);
35 break;
36 case 4:
37 case 5:
38 case 6:
39 case 7:
40 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster);
41 break;
42 }
43 }
44 }
45
TEST(PROCESSORS,package)46 TEST(PROCESSORS, package) {
47 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
48 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
49 }
50 }
51
TEST(PROCESSORS,linux_id)52 TEST(PROCESSORS, linux_id) {
53 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
54 switch (i) {
55 case 0:
56 case 1:
57 case 2:
58 case 3:
59 ASSERT_EQ(i + 4, cpuinfo_get_processor(i)->linux_id);
60 break;
61 case 4:
62 case 5:
63 case 6:
64 case 7:
65 ASSERT_EQ(i - 4, cpuinfo_get_processor(i)->linux_id);
66 break;
67 }
68 }
69 }
70
TEST(PROCESSORS,l1i)71 TEST(PROCESSORS, l1i) {
72 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
73 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
74 }
75 }
76
TEST(PROCESSORS,l1d)77 TEST(PROCESSORS, l1d) {
78 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
79 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
80 }
81 }
82
TEST(PROCESSORS,l2)83 TEST(PROCESSORS, l2) {
84 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
85 switch (i) {
86 case 0:
87 case 1:
88 case 2:
89 case 3:
90 ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2);
91 break;
92 case 4:
93 case 5:
94 case 6:
95 case 7:
96 ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2);
97 break;
98 }
99 }
100 }
101
TEST(PROCESSORS,l3)102 TEST(PROCESSORS, l3) {
103 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
104 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
105 }
106 }
107
TEST(PROCESSORS,l4)108 TEST(PROCESSORS, l4) {
109 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
110 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
111 }
112 }
113
TEST(CORES,count)114 TEST(CORES, count) {
115 ASSERT_EQ(8, cpuinfo_get_cores_count());
116 }
117
TEST(CORES,non_null)118 TEST(CORES, non_null) {
119 ASSERT_TRUE(cpuinfo_get_cores());
120 }
121
TEST(CORES,processor_start)122 TEST(CORES, processor_start) {
123 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
124 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
125 }
126 }
127
TEST(CORES,processor_count)128 TEST(CORES, processor_count) {
129 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
130 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
131 }
132 }
133
TEST(CORES,core_id)134 TEST(CORES, core_id) {
135 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
136 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
137 }
138 }
139
TEST(CORES,package)140 TEST(CORES, package) {
141 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
142 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
143 }
144 }
145
TEST(CORES,vendor)146 TEST(CORES, vendor) {
147 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
148 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
149 }
150 }
151
TEST(CORES,uarch)152 TEST(CORES, uarch) {
153 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
154 switch (i) {
155 case 0:
156 case 1:
157 case 2:
158 case 3:
159 ASSERT_EQ(cpuinfo_uarch_cortex_a17, cpuinfo_get_core(i)->uarch);
160 break;
161 case 4:
162 case 5:
163 case 6:
164 case 7:
165 ASSERT_EQ(cpuinfo_uarch_cortex_a7, cpuinfo_get_core(i)->uarch);
166 break;
167 }
168 }
169 }
170
TEST(CORES,midr)171 TEST(CORES, midr) {
172 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
173 switch (i) {
174 case 0:
175 case 1:
176 case 2:
177 case 3:
178 ASSERT_EQ(UINT32_C(0x410FC0E0), cpuinfo_get_core(i)->midr);
179 break;
180 case 4:
181 case 5:
182 case 6:
183 case 7:
184 ASSERT_EQ(UINT32_C(0x410FC075), cpuinfo_get_core(i)->midr);
185 break;
186 }
187 }
188 }
189
TEST(CORES,DISABLED_frequency)190 TEST(CORES, DISABLED_frequency) {
191 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
192 switch (i) {
193 case 0:
194 case 1:
195 case 2:
196 case 3:
197 ASSERT_EQ(UINT64_C(2002000000), cpuinfo_get_core(i)->frequency);
198 break;
199 case 4:
200 case 5:
201 case 6:
202 case 7:
203 ASSERT_EQ(UINT64_C(1690000000), cpuinfo_get_core(i)->frequency);
204 break;
205 }
206 }
207 }
208
TEST(CLUSTERS,count)209 TEST(CLUSTERS, count) {
210 ASSERT_EQ(2, cpuinfo_get_clusters_count());
211 }
212
TEST(CLUSTERS,non_null)213 TEST(CLUSTERS, non_null) {
214 ASSERT_TRUE(cpuinfo_get_clusters());
215 }
216
TEST(CLUSTERS,processor_start)217 TEST(CLUSTERS, processor_start) {
218 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
219 switch (i) {
220 case 0:
221 ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start);
222 break;
223 case 1:
224 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_start);
225 break;
226 }
227 }
228 }
229
TEST(CLUSTERS,processor_count)230 TEST(CLUSTERS, processor_count) {
231 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
232 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count);
233 }
234 }
235
TEST(CLUSTERS,core_start)236 TEST(CLUSTERS, core_start) {
237 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
238 switch (i) {
239 case 0:
240 ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start);
241 break;
242 case 1:
243 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_start);
244 break;
245 }
246 }
247 }
248
TEST(CLUSTERS,core_count)249 TEST(CLUSTERS, core_count) {
250 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
251 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count);
252 }
253 }
254
TEST(CLUSTERS,cluster_id)255 TEST(CLUSTERS, cluster_id) {
256 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
257 ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id);
258 }
259 }
260
TEST(CLUSTERS,package)261 TEST(CLUSTERS, package) {
262 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
263 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package);
264 }
265 }
266
TEST(CLUSTERS,vendor)267 TEST(CLUSTERS, vendor) {
268 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
269 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor);
270 }
271 }
272
TEST(CLUSTERS,uarch)273 TEST(CLUSTERS, uarch) {
274 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
275 switch (i) {
276 case 0:
277 ASSERT_EQ(cpuinfo_uarch_cortex_a17, cpuinfo_get_cluster(i)->uarch);
278 break;
279 case 1:
280 ASSERT_EQ(cpuinfo_uarch_cortex_a7, cpuinfo_get_cluster(i)->uarch);
281 break;
282 }
283 }
284 }
285
TEST(CLUSTERS,midr)286 TEST(CLUSTERS, midr) {
287 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
288 switch (i) {
289 case 0:
290 ASSERT_EQ(UINT32_C(0x410FC0E0), cpuinfo_get_cluster(i)->midr);
291 break;
292 case 1:
293 ASSERT_EQ(UINT32_C(0x410FC075), cpuinfo_get_cluster(i)->midr);
294 break;
295 }
296 }
297 }
298
TEST(CLUSTERS,DISABLED_frequency)299 TEST(CLUSTERS, DISABLED_frequency) {
300 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
301 switch (i) {
302 case 0:
303 ASSERT_EQ(UINT64_C(2002000000), cpuinfo_get_cluster(i)->frequency);
304 break;
305 case 1:
306 ASSERT_EQ(UINT64_C(1690000000), cpuinfo_get_cluster(i)->frequency);
307 break;
308 }
309 }
310 }
311
TEST(PACKAGES,count)312 TEST(PACKAGES, count) {
313 ASSERT_EQ(1, cpuinfo_get_packages_count());
314 }
315
TEST(PACKAGES,name)316 TEST(PACKAGES, name) {
317 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
318 ASSERT_EQ("MediaTek MT6595",
319 std::string(cpuinfo_get_package(i)->name,
320 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
321 }
322 }
323
TEST(PACKAGES,processor_start)324 TEST(PACKAGES, processor_start) {
325 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
326 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
327 }
328 }
329
TEST(PACKAGES,processor_count)330 TEST(PACKAGES, processor_count) {
331 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
332 ASSERT_EQ(8, cpuinfo_get_package(i)->processor_count);
333 }
334 }
335
TEST(PACKAGES,core_start)336 TEST(PACKAGES, core_start) {
337 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
338 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
339 }
340 }
341
TEST(PACKAGES,core_count)342 TEST(PACKAGES, core_count) {
343 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
344 ASSERT_EQ(8, cpuinfo_get_package(i)->core_count);
345 }
346 }
347
TEST(PACKAGES,cluster_start)348 TEST(PACKAGES, cluster_start) {
349 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
350 ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start);
351 }
352 }
353
TEST(PACKAGES,cluster_count)354 TEST(PACKAGES, cluster_count) {
355 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
356 ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count);
357 }
358 }
359
TEST(ISA,thumb)360 TEST(ISA, thumb) {
361 ASSERT_TRUE(cpuinfo_has_arm_thumb());
362 }
363
TEST(ISA,thumb2)364 TEST(ISA, thumb2) {
365 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
366 }
367
TEST(ISA,armv5e)368 TEST(ISA, armv5e) {
369 ASSERT_TRUE(cpuinfo_has_arm_v5e());
370 }
371
TEST(ISA,armv6)372 TEST(ISA, armv6) {
373 ASSERT_TRUE(cpuinfo_has_arm_v6());
374 }
375
TEST(ISA,armv6k)376 TEST(ISA, armv6k) {
377 ASSERT_TRUE(cpuinfo_has_arm_v6k());
378 }
379
TEST(ISA,armv7)380 TEST(ISA, armv7) {
381 ASSERT_TRUE(cpuinfo_has_arm_v7());
382 }
383
TEST(ISA,armv7mp)384 TEST(ISA, armv7mp) {
385 ASSERT_TRUE(cpuinfo_has_arm_v7mp());
386 }
387
TEST(ISA,idiv)388 TEST(ISA, idiv) {
389 ASSERT_TRUE(cpuinfo_has_arm_idiv());
390 }
391
TEST(ISA,vfpv2)392 TEST(ISA, vfpv2) {
393 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
394 }
395
TEST(ISA,vfpv3)396 TEST(ISA, vfpv3) {
397 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
398 }
399
TEST(ISA,vfpv3_d32)400 TEST(ISA, vfpv3_d32) {
401 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
402 }
403
TEST(ISA,vfpv3_fp16)404 TEST(ISA, vfpv3_fp16) {
405 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
406 }
407
TEST(ISA,vfpv3_fp16_d32)408 TEST(ISA, vfpv3_fp16_d32) {
409 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
410 }
411
TEST(ISA,vfpv4)412 TEST(ISA, vfpv4) {
413 ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
414 }
415
TEST(ISA,vfpv4_d32)416 TEST(ISA, vfpv4_d32) {
417 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
418 }
419
TEST(ISA,wmmx)420 TEST(ISA, wmmx) {
421 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
422 }
423
TEST(ISA,wmmx2)424 TEST(ISA, wmmx2) {
425 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
426 }
427
TEST(ISA,neon)428 TEST(ISA, neon) {
429 ASSERT_TRUE(cpuinfo_has_arm_neon());
430 }
431
TEST(ISA,neon_fp16)432 TEST(ISA, neon_fp16) {
433 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
434 }
435
TEST(ISA,neon_fma)436 TEST(ISA, neon_fma) {
437 ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
438 }
439
TEST(ISA,atomics)440 TEST(ISA, atomics) {
441 ASSERT_FALSE(cpuinfo_has_arm_atomics());
442 }
443
TEST(ISA,neon_rdm)444 TEST(ISA, neon_rdm) {
445 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
446 }
447
TEST(ISA,fp16_arith)448 TEST(ISA, fp16_arith) {
449 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
450 }
451
TEST(ISA,neon_fp16_arith)452 TEST(ISA, neon_fp16_arith) {
453 ASSERT_FALSE(cpuinfo_has_arm_neon_fp16_arith());
454 }
455
TEST(ISA,neon_dot)456 TEST(ISA, neon_dot) {
457 ASSERT_FALSE(cpuinfo_has_arm_neon_dot());
458 }
459
TEST(ISA,jscvt)460 TEST(ISA, jscvt) {
461 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
462 }
463
TEST(ISA,fcma)464 TEST(ISA, fcma) {
465 ASSERT_FALSE(cpuinfo_has_arm_fcma());
466 }
467
TEST(ISA,aes)468 TEST(ISA, aes) {
469 ASSERT_FALSE(cpuinfo_has_arm_aes());
470 }
471
TEST(ISA,sha1)472 TEST(ISA, sha1) {
473 ASSERT_FALSE(cpuinfo_has_arm_sha1());
474 }
475
TEST(ISA,sha2)476 TEST(ISA, sha2) {
477 ASSERT_FALSE(cpuinfo_has_arm_sha2());
478 }
479
TEST(ISA,pmull)480 TEST(ISA, pmull) {
481 ASSERT_FALSE(cpuinfo_has_arm_pmull());
482 }
483
TEST(ISA,crc32)484 TEST(ISA, crc32) {
485 ASSERT_FALSE(cpuinfo_has_arm_crc32());
486 }
487
TEST(L1I,count)488 TEST(L1I, count) {
489 ASSERT_EQ(8, cpuinfo_get_l1i_caches_count());
490 }
491
TEST(L1I,non_null)492 TEST(L1I, non_null) {
493 ASSERT_TRUE(cpuinfo_get_l1i_caches());
494 }
495
TEST(L1I,size)496 TEST(L1I, size) {
497 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
498 ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size);
499 }
500 }
501
TEST(L1I,associativity)502 TEST(L1I, associativity) {
503 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
504 switch (i) {
505 case 0:
506 case 1:
507 case 2:
508 case 3:
509 ASSERT_EQ(4, cpuinfo_get_l1i_cache(i)->associativity);
510 break;
511 case 4:
512 case 5:
513 case 6:
514 case 7:
515 ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity);
516 break;
517 }
518 }
519 }
520
TEST(L1I,sets)521 TEST(L1I, sets) {
522 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
523 ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size,
524 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
525 }
526 }
527
TEST(L1I,partitions)528 TEST(L1I, partitions) {
529 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
530 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
531 }
532 }
533
TEST(L1I,line_size)534 TEST(L1I, line_size) {
535 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
536 switch (i) {
537 case 0:
538 case 1:
539 case 2:
540 case 3:
541 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
542 break;
543 case 4:
544 case 5:
545 case 6:
546 case 7:
547 ASSERT_EQ(32, cpuinfo_get_l1i_cache(i)->line_size);
548 break;
549 }
550 }
551 }
552
TEST(L1I,flags)553 TEST(L1I, flags) {
554 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
555 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
556 }
557 }
558
TEST(L1I,processors)559 TEST(L1I, processors) {
560 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
561 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
562 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
563 }
564 }
565
TEST(L1D,count)566 TEST(L1D, count) {
567 ASSERT_EQ(8, cpuinfo_get_l1d_caches_count());
568 }
569
TEST(L1D,non_null)570 TEST(L1D, non_null) {
571 ASSERT_TRUE(cpuinfo_get_l1d_caches());
572 }
573
TEST(L1D,size)574 TEST(L1D, size) {
575 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
576 ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size);
577 }
578 }
579
TEST(L1D,associativity)580 TEST(L1D, associativity) {
581 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
582 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
583 }
584 }
585
TEST(L1D,sets)586 TEST(L1D, sets) {
587 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
588 ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size,
589 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
590 }
591 }
592
TEST(L1D,partitions)593 TEST(L1D, partitions) {
594 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
595 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
596 }
597 }
598
TEST(L1D,line_size)599 TEST(L1D, line_size) {
600 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
601 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
602 }
603 }
604
TEST(L1D,flags)605 TEST(L1D, flags) {
606 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
607 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
608 }
609 }
610
TEST(L1D,processors)611 TEST(L1D, processors) {
612 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
613 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
614 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
615 }
616 }
617
TEST(L2,count)618 TEST(L2, count) {
619 ASSERT_EQ(2, cpuinfo_get_l2_caches_count());
620 }
621
TEST(L2,non_null)622 TEST(L2, non_null) {
623 ASSERT_TRUE(cpuinfo_get_l2_caches());
624 }
625
TEST(L2,size)626 TEST(L2, size) {
627 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
628 switch (i) {
629 case 0:
630 ASSERT_EQ(2 * 1024 * 1024, cpuinfo_get_l2_cache(i)->size);
631 break;
632 case 1:
633 ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size);
634 break;
635 }
636 }
637 }
638
TEST(L2,associativity)639 TEST(L2, associativity) {
640 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
641 switch (i) {
642 case 0:
643 ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity);
644 break;
645 case 1:
646 ASSERT_EQ(8, cpuinfo_get_l2_cache(i)->associativity);
647 break;
648 }
649 }
650 }
651
TEST(L2,sets)652 TEST(L2, sets) {
653 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
654 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
655 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
656 }
657 }
658
TEST(L2,partitions)659 TEST(L2, partitions) {
660 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
661 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
662 }
663 }
664
TEST(L2,line_size)665 TEST(L2, line_size) {
666 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
667 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
668 }
669 }
670
TEST(L2,flags)671 TEST(L2, flags) {
672 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
673 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
674 }
675 }
676
TEST(L2,processors)677 TEST(L2, processors) {
678 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
679 switch (i) {
680 case 0:
681 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start);
682 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
683 break;
684 case 1:
685 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_start);
686 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
687 break;
688 }
689 }
690 }
691
TEST(L3,none)692 TEST(L3, none) {
693 ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
694 ASSERT_FALSE(cpuinfo_get_l3_caches());
695 }
696
TEST(L4,none)697 TEST(L4, none) {
698 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
699 ASSERT_FALSE(cpuinfo_get_l4_caches());
700 }
701
702 #include <lenovo-vibe-x2.h>
703
main(int argc,char * argv[])704 int main(int argc, char* argv[]) {
705 #if CPUINFO_ARCH_ARM
706 cpuinfo_set_hwcap(UINT32_C(0x0007B8D7));
707 #endif
708 cpuinfo_mock_filesystem(filesystem);
709 #ifdef __ANDROID__
710 cpuinfo_mock_android_properties(properties);
711 #endif
712 cpuinfo_initialize();
713 ::testing::InitGoogleTest(&argc, argv);
714 return RUN_ALL_TESTS();
715 }