1 #include <gtest/gtest.h>
2
3 #include <cpuinfo.h>
4 #include <cpuinfo-mock.h>
5
6
TEST(PROCESSORS,count)7 TEST(PROCESSORS, count) {
8 ASSERT_EQ(10, cpuinfo_get_processors_count());
9 }
10
TEST(PROCESSORS,non_null)11 TEST(PROCESSORS, non_null) {
12 ASSERT_TRUE(cpuinfo_get_processors());
13 }
14
TEST(PROCESSORS,smt_id)15 TEST(PROCESSORS, smt_id) {
16 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
18 }
19 }
20
TEST(PROCESSORS,core)21 TEST(PROCESSORS, core) {
22 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
24 }
25 }
26
TEST(PROCESSORS,cluster)27 TEST(PROCESSORS, cluster) {
28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 switch (i) {
30 case 0:
31 case 1:
32 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster);
33 break;
34 case 2:
35 case 3:
36 case 4:
37 case 5:
38 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster);
39 break;
40 case 6:
41 case 7:
42 case 8:
43 case 9:
44 ASSERT_EQ(cpuinfo_get_cluster(2), cpuinfo_get_processor(i)->cluster);
45 break;
46 }
47 }
48 }
49
TEST(PROCESSORS,package)50 TEST(PROCESSORS, package) {
51 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
52 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
53 }
54 }
55
TEST(PROCESSORS,linux_id)56 TEST(PROCESSORS, linux_id) {
57 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
58 switch (i) {
59 case 0:
60 case 1:
61 ASSERT_EQ(i + 8, cpuinfo_get_processor(i)->linux_id);
62 break;
63 case 2:
64 case 3:
65 case 4:
66 case 5:
67 ASSERT_EQ(i + 2, cpuinfo_get_processor(i)->linux_id);
68 break;
69 case 6:
70 case 7:
71 case 8:
72 case 9:
73 ASSERT_EQ(i - 6, cpuinfo_get_processor(i)->linux_id);
74 break;
75 }
76 }
77 }
78
TEST(PROCESSORS,l1i)79 TEST(PROCESSORS, l1i) {
80 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
81 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
82 }
83 }
84
TEST(PROCESSORS,l1d)85 TEST(PROCESSORS, l1d) {
86 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
87 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
88 }
89 }
90
TEST(PROCESSORS,l2)91 TEST(PROCESSORS, l2) {
92 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
93 switch (i) {
94 case 0:
95 case 1:
96 ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2);
97 break;
98 case 2:
99 case 3:
100 case 4:
101 case 5:
102 ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2);
103 break;
104 case 6:
105 case 7:
106 case 8:
107 case 9:
108 ASSERT_EQ(cpuinfo_get_l2_cache(2), cpuinfo_get_processor(i)->cache.l2);
109 break;
110 }
111 }
112 }
113
TEST(PROCESSORS,l3)114 TEST(PROCESSORS, l3) {
115 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
116 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
117 }
118 }
119
TEST(PROCESSORS,l4)120 TEST(PROCESSORS, l4) {
121 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
122 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
123 }
124 }
125
TEST(CORES,count)126 TEST(CORES, count) {
127 ASSERT_EQ(10, cpuinfo_get_cores_count());
128 }
129
TEST(CORES,non_null)130 TEST(CORES, non_null) {
131 ASSERT_TRUE(cpuinfo_get_cores());
132 }
133
TEST(CORES,processor_start)134 TEST(CORES, processor_start) {
135 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
136 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
137 }
138 }
139
TEST(CORES,processor_count)140 TEST(CORES, processor_count) {
141 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
142 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
143 }
144 }
145
TEST(CORES,core_id)146 TEST(CORES, core_id) {
147 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
148 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
149 }
150 }
151
TEST(CORES,cluster)152 TEST(CORES, cluster) {
153 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
154 switch (i) {
155 case 0:
156 case 1:
157 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster);
158 break;
159 case 2:
160 case 3:
161 case 4:
162 case 5:
163 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster);
164 break;
165 case 6:
166 case 7:
167 case 8:
168 case 9:
169 ASSERT_EQ(cpuinfo_get_cluster(2), cpuinfo_get_core(i)->cluster);
170 break;
171 }
172 }
173 }
174
TEST(CORES,package)175 TEST(CORES, package) {
176 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
177 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
178 }
179 }
180
TEST(CORES,vendor)181 TEST(CORES, vendor) {
182 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
183 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
184 }
185 }
186
TEST(CORES,uarch)187 TEST(CORES, uarch) {
188 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
189 switch (i) {
190 case 0:
191 case 1:
192 ASSERT_EQ(cpuinfo_uarch_cortex_a73, cpuinfo_get_core(i)->uarch);
193 break;
194 case 2:
195 case 3:
196 case 4:
197 case 5:
198 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch);
199 break;
200 case 6:
201 case 7:
202 case 8:
203 case 9:
204 ASSERT_EQ(cpuinfo_uarch_cortex_a35, cpuinfo_get_core(i)->uarch);
205 break;
206 }
207 }
208 }
209
TEST(CORES,midr)210 TEST(CORES, midr) {
211 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
212 switch (i) {
213 case 0:
214 case 1:
215 ASSERT_EQ(UINT32_C(0x410FD092), cpuinfo_get_core(i)->midr);
216 break;
217 case 2:
218 case 3:
219 case 4:
220 case 5:
221 ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_core(i)->midr);
222 break;
223 case 6:
224 case 7:
225 case 8:
226 case 9:
227 ASSERT_EQ(UINT32_C(0x410FD041), cpuinfo_get_core(i)->midr);
228 break;
229 }
230 }
231 }
232
TEST(CORES,DISABLED_frequency)233 TEST(CORES, DISABLED_frequency) {
234 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
235 switch (i) {
236 case 0:
237 case 1:
238 ASSERT_EQ(UINT64_C(2600000000), cpuinfo_get_core(i)->frequency);
239 break;
240 case 2:
241 case 3:
242 case 4:
243 case 5:
244 ASSERT_EQ(UINT64_C(2197000000), cpuinfo_get_core(i)->frequency);
245 break;
246 case 6:
247 case 7:
248 case 8:
249 case 9:
250 ASSERT_EQ(UINT64_C(1898000000), cpuinfo_get_core(i)->frequency);
251 break;
252 }
253 }
254 }
255
TEST(CLUSTERS,count)256 TEST(CLUSTERS, count) {
257 ASSERT_EQ(3, cpuinfo_get_clusters_count());
258 }
259
TEST(CLUSTERS,non_null)260 TEST(CLUSTERS, non_null) {
261 ASSERT_TRUE(cpuinfo_get_clusters());
262 }
263
TEST(CLUSTERS,processor_start)264 TEST(CLUSTERS, processor_start) {
265 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
266 switch (i) {
267 case 0:
268 ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start);
269 break;
270 case 1:
271 ASSERT_EQ(2, cpuinfo_get_cluster(i)->processor_start);
272 break;
273 case 2:
274 ASSERT_EQ(6, cpuinfo_get_cluster(i)->processor_start);
275 break;
276 }
277 }
278 }
279
TEST(CLUSTERS,processor_count)280 TEST(CLUSTERS, processor_count) {
281 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
282 switch (i) {
283 case 0:
284 ASSERT_EQ(2, cpuinfo_get_cluster(i)->processor_count);
285 break;
286 case 1:
287 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count);
288 break;
289 case 2:
290 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count);
291 break;
292 }
293 }
294 }
295
TEST(CLUSTERS,core_start)296 TEST(CLUSTERS, core_start) {
297 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
298 switch (i) {
299 case 0:
300 ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start);
301 break;
302 case 1:
303 ASSERT_EQ(2, cpuinfo_get_cluster(i)->core_start);
304 break;
305 case 2:
306 ASSERT_EQ(6, cpuinfo_get_cluster(i)->core_start);
307 break;
308 }
309 }
310 }
311
TEST(CLUSTERS,core_count)312 TEST(CLUSTERS, core_count) {
313 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
314 switch (i) {
315 case 0:
316 ASSERT_EQ(2, cpuinfo_get_cluster(i)->core_count);
317 break;
318 case 1:
319 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count);
320 break;
321 case 2:
322 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count);
323 break;
324 }
325 }
326 }
327
TEST(CLUSTERS,cluster_id)328 TEST(CLUSTERS, cluster_id) {
329 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
330 ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id);
331 }
332 }
333
TEST(CLUSTERS,package)334 TEST(CLUSTERS, package) {
335 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
336 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package);
337 }
338 }
339
TEST(CLUSTERS,vendor)340 TEST(CLUSTERS, vendor) {
341 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
342 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor);
343 }
344 }
345
TEST(CLUSTERS,uarch)346 TEST(CLUSTERS, uarch) {
347 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
348 switch (i) {
349 case 0:
350 ASSERT_EQ(cpuinfo_uarch_cortex_a73, cpuinfo_get_cluster(i)->uarch);
351 break;
352 case 1:
353 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_cluster(i)->uarch);
354 break;
355 case 2:
356 ASSERT_EQ(cpuinfo_uarch_cortex_a35, cpuinfo_get_cluster(i)->uarch);
357 break;
358 }
359 }
360 }
361
TEST(CLUSTERS,midr)362 TEST(CLUSTERS, midr) {
363 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
364 switch (i) {
365 case 0:
366 ASSERT_EQ(UINT32_C(0x410FD092), cpuinfo_get_cluster(i)->midr);
367 break;
368 case 1:
369 ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_cluster(i)->midr);
370 break;
371 case 2:
372 ASSERT_EQ(UINT32_C(0x410FD041), cpuinfo_get_cluster(i)->midr);
373 break;
374 }
375 }
376 }
377
TEST(CLUSTERS,DISABLED_frequency)378 TEST(CLUSTERS, DISABLED_frequency) {
379 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
380 switch (i) {
381 case 0:
382 ASSERT_EQ(UINT64_C(2600000000), cpuinfo_get_cluster(i)->frequency);
383 break;
384 case 1:
385 ASSERT_EQ(UINT64_C(2197000000), cpuinfo_get_cluster(i)->frequency);
386 break;
387 case 2:
388 ASSERT_EQ(UINT64_C(1898000000), cpuinfo_get_cluster(i)->frequency);
389 break;
390 }
391 }
392 }
393
TEST(PACKAGES,count)394 TEST(PACKAGES, count) {
395 ASSERT_EQ(1, cpuinfo_get_packages_count());
396 }
397
TEST(PACKAGES,name)398 TEST(PACKAGES, name) {
399 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
400 ASSERT_EQ("MediaTek MT6799",
401 std::string(cpuinfo_get_package(i)->name,
402 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
403 }
404 }
405
TEST(PACKAGES,processor_start)406 TEST(PACKAGES, processor_start) {
407 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
408 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
409 }
410 }
411
TEST(PACKAGES,processor_count)412 TEST(PACKAGES, processor_count) {
413 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
414 ASSERT_EQ(10, cpuinfo_get_package(i)->processor_count);
415 }
416 }
417
TEST(PACKAGES,core_start)418 TEST(PACKAGES, core_start) {
419 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
420 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
421 }
422 }
423
TEST(PACKAGES,core_count)424 TEST(PACKAGES, core_count) {
425 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
426 ASSERT_EQ(10, cpuinfo_get_package(i)->core_count);
427 }
428 }
429
TEST(PACKAGES,cluster_start)430 TEST(PACKAGES, cluster_start) {
431 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
432 ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start);
433 }
434 }
435
TEST(PACKAGES,cluster_count)436 TEST(PACKAGES, cluster_count) {
437 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
438 ASSERT_EQ(3, cpuinfo_get_package(i)->cluster_count);
439 }
440 }
441
TEST(ISA,thumb)442 TEST(ISA, thumb) {
443 #if CPUINFO_ARCH_ARM
444 ASSERT_TRUE(cpuinfo_has_arm_thumb());
445 #elif CPUINFO_ARCH_ARM64
446 ASSERT_FALSE(cpuinfo_has_arm_thumb());
447 #endif
448 }
449
TEST(ISA,thumb2)450 TEST(ISA, thumb2) {
451 #if CPUINFO_ARCH_ARM
452 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
453 #elif CPUINFO_ARCH_ARM64
454 ASSERT_FALSE(cpuinfo_has_arm_thumb2());
455 #endif
456 }
457
TEST(ISA,armv5e)458 TEST(ISA, armv5e) {
459 #if CPUINFO_ARCH_ARM
460 ASSERT_TRUE(cpuinfo_has_arm_v5e());
461 #elif CPUINFO_ARCH_ARM64
462 ASSERT_FALSE(cpuinfo_has_arm_v5e());
463 #endif
464 }
465
TEST(ISA,armv6)466 TEST(ISA, armv6) {
467 #if CPUINFO_ARCH_ARM
468 ASSERT_TRUE(cpuinfo_has_arm_v6());
469 #elif CPUINFO_ARCH_ARM64
470 ASSERT_FALSE(cpuinfo_has_arm_v6());
471 #endif
472 }
473
TEST(ISA,armv6k)474 TEST(ISA, armv6k) {
475 #if CPUINFO_ARCH_ARM
476 ASSERT_TRUE(cpuinfo_has_arm_v6k());
477 #elif CPUINFO_ARCH_ARM64
478 ASSERT_FALSE(cpuinfo_has_arm_v6k());
479 #endif
480 }
481
TEST(ISA,armv7)482 TEST(ISA, armv7) {
483 #if CPUINFO_ARCH_ARM
484 ASSERT_TRUE(cpuinfo_has_arm_v7());
485 #elif CPUINFO_ARCH_ARM64
486 ASSERT_FALSE(cpuinfo_has_arm_v7());
487 #endif
488 }
489
TEST(ISA,armv7mp)490 TEST(ISA, armv7mp) {
491 #if CPUINFO_ARCH_ARM
492 ASSERT_TRUE(cpuinfo_has_arm_v7mp());
493 #elif CPUINFO_ARCH_ARM64
494 ASSERT_FALSE(cpuinfo_has_arm_v7mp());
495 #endif
496 }
497
TEST(ISA,idiv)498 TEST(ISA, idiv) {
499 ASSERT_TRUE(cpuinfo_has_arm_idiv());
500 }
501
TEST(ISA,vfpv2)502 TEST(ISA, vfpv2) {
503 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
504 }
505
TEST(ISA,vfpv3)506 TEST(ISA, vfpv3) {
507 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
508 }
509
TEST(ISA,vfpv3_d32)510 TEST(ISA, vfpv3_d32) {
511 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
512 }
513
TEST(ISA,vfpv3_fp16)514 TEST(ISA, vfpv3_fp16) {
515 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
516 }
517
TEST(ISA,vfpv3_fp16_d32)518 TEST(ISA, vfpv3_fp16_d32) {
519 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
520 }
521
TEST(ISA,vfpv4)522 TEST(ISA, vfpv4) {
523 ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
524 }
525
TEST(ISA,vfpv4_d32)526 TEST(ISA, vfpv4_d32) {
527 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
528 }
529
TEST(ISA,wmmx)530 TEST(ISA, wmmx) {
531 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
532 }
533
TEST(ISA,wmmx2)534 TEST(ISA, wmmx2) {
535 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
536 }
537
TEST(ISA,neon)538 TEST(ISA, neon) {
539 ASSERT_TRUE(cpuinfo_has_arm_neon());
540 }
541
TEST(ISA,neon_fp16)542 TEST(ISA, neon_fp16) {
543 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
544 }
545
TEST(ISA,neon_fma)546 TEST(ISA, neon_fma) {
547 ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
548 }
549
TEST(ISA,atomics)550 TEST(ISA, atomics) {
551 ASSERT_FALSE(cpuinfo_has_arm_atomics());
552 }
553
TEST(ISA,neon_rdm)554 TEST(ISA, neon_rdm) {
555 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
556 }
557
TEST(ISA,fp16_arith)558 TEST(ISA, fp16_arith) {
559 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
560 }
561
TEST(ISA,neon_fp16_arith)562 TEST(ISA, neon_fp16_arith) {
563 ASSERT_FALSE(cpuinfo_has_arm_neon_fp16_arith());
564 }
565
TEST(ISA,neon_dot)566 TEST(ISA, neon_dot) {
567 ASSERT_FALSE(cpuinfo_has_arm_neon_dot());
568 }
569
TEST(ISA,jscvt)570 TEST(ISA, jscvt) {
571 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
572 }
573
TEST(ISA,fcma)574 TEST(ISA, fcma) {
575 ASSERT_FALSE(cpuinfo_has_arm_fcma());
576 }
577
TEST(ISA,aes)578 TEST(ISA, aes) {
579 ASSERT_TRUE(cpuinfo_has_arm_aes());
580 }
581
TEST(ISA,sha1)582 TEST(ISA, sha1) {
583 ASSERT_TRUE(cpuinfo_has_arm_sha1());
584 }
585
TEST(ISA,sha2)586 TEST(ISA, sha2) {
587 ASSERT_TRUE(cpuinfo_has_arm_sha2());
588 }
589
TEST(ISA,pmull)590 TEST(ISA, pmull) {
591 ASSERT_TRUE(cpuinfo_has_arm_pmull());
592 }
593
TEST(ISA,crc32)594 TEST(ISA, crc32) {
595 ASSERT_TRUE(cpuinfo_has_arm_crc32());
596 }
597
TEST(L1I,count)598 TEST(L1I, count) {
599 ASSERT_EQ(10, cpuinfo_get_l1i_caches_count());
600 }
601
TEST(L1I,non_null)602 TEST(L1I, non_null) {
603 ASSERT_TRUE(cpuinfo_get_l1i_caches());
604 }
605
TEST(L1I,size)606 TEST(L1I, size) {
607 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
608 switch (i) {
609 case 0:
610 case 1:
611 ASSERT_EQ(64 * 1024, cpuinfo_get_l1i_cache(i)->size);
612 break;
613 case 2:
614 case 3:
615 case 4:
616 case 5:
617 case 6:
618 case 7:
619 case 8:
620 case 9:
621 ASSERT_EQ(16 * 1024, cpuinfo_get_l1i_cache(i)->size);
622 break;
623 }
624 }
625 }
626
TEST(L1I,associativity)627 TEST(L1I, associativity) {
628 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
629 switch (i) {
630 case 0:
631 case 1:
632 ASSERT_EQ(4, cpuinfo_get_l1i_cache(i)->associativity);
633 break;
634 case 2:
635 case 3:
636 case 4:
637 case 5:
638 case 6:
639 case 7:
640 case 8:
641 case 9:
642 ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity);
643 break;
644 }
645 }
646 }
647
TEST(L1I,sets)648 TEST(L1I, sets) {
649 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
650 ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size,
651 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
652 }
653 }
654
TEST(L1I,partitions)655 TEST(L1I, partitions) {
656 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
657 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
658 }
659 }
660
TEST(L1I,line_size)661 TEST(L1I, line_size) {
662 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
663 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
664 }
665 }
666
TEST(L1I,flags)667 TEST(L1I, flags) {
668 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
669 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
670 }
671 }
672
TEST(L1I,processors)673 TEST(L1I, processors) {
674 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
675 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
676 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
677 }
678 }
679
TEST(L1D,count)680 TEST(L1D, count) {
681 ASSERT_EQ(10, cpuinfo_get_l1d_caches_count());
682 }
683
TEST(L1D,non_null)684 TEST(L1D, non_null) {
685 ASSERT_TRUE(cpuinfo_get_l1d_caches());
686 }
687
TEST(L1D,size)688 TEST(L1D, size) {
689 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
690 switch (i) {
691 case 0:
692 case 1:
693 ASSERT_EQ(64 * 1024, cpuinfo_get_l1d_cache(i)->size);
694 break;
695 case 2:
696 case 3:
697 case 4:
698 case 5:
699 case 6:
700 case 7:
701 case 8:
702 case 9:
703 ASSERT_EQ(16 * 1024, cpuinfo_get_l1d_cache(i)->size);
704 break;
705 }
706 }
707 }
708
TEST(L1D,associativity)709 TEST(L1D, associativity) {
710 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
711 switch (i) {
712 case 0:
713 case 1:
714 ASSERT_EQ(16, cpuinfo_get_l1d_cache(i)->associativity);
715 break;
716 case 2:
717 case 3:
718 case 4:
719 case 5:
720 case 6:
721 case 7:
722 case 8:
723 case 9:
724 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
725 break;
726 }
727 }
728 }
729
TEST(L1D,sets)730 TEST(L1D, sets) {
731 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
732 ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size,
733 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
734 }
735 }
736
TEST(L1D,partitions)737 TEST(L1D, partitions) {
738 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
739 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
740 }
741 }
742
TEST(L1D,line_size)743 TEST(L1D, line_size) {
744 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
745 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
746 }
747 }
748
TEST(L1D,flags)749 TEST(L1D, flags) {
750 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
751 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
752 }
753 }
754
TEST(L1D,processors)755 TEST(L1D, processors) {
756 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
757 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
758 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
759 }
760 }
761
TEST(L2,count)762 TEST(L2, count) {
763 ASSERT_EQ(3, cpuinfo_get_l2_caches_count());
764 }
765
TEST(L2,non_null)766 TEST(L2, non_null) {
767 ASSERT_TRUE(cpuinfo_get_l2_caches());
768 }
769
TEST(L2,size)770 TEST(L2, size) {
771 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
772 switch (i) {
773 case 0:
774 ASSERT_EQ(1 * 1024 * 1024, cpuinfo_get_l2_cache(i)->size);
775 break;
776 case 1:
777 case 2:
778 ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size);
779 break;
780 }
781 }
782 }
783
TEST(L2,associativity)784 TEST(L2, associativity) {
785 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
786 switch (i) {
787 case 0:
788 case 1:
789 ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity);
790 break;
791 case 2:
792 ASSERT_EQ(8, cpuinfo_get_l2_cache(i)->associativity);
793 break;
794 }
795 }
796 }
797
TEST(L2,sets)798 TEST(L2, sets) {
799 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
800 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
801 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
802 }
803 }
804
TEST(L2,partitions)805 TEST(L2, partitions) {
806 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
807 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
808 }
809 }
810
TEST(L2,line_size)811 TEST(L2, line_size) {
812 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
813 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
814 }
815 }
816
TEST(L2,flags)817 TEST(L2, flags) {
818 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
819 switch (i) {
820 case 0:
821 ASSERT_EQ(CPUINFO_CACHE_INCLUSIVE, cpuinfo_get_l2_cache(i)->flags);
822 break;
823 case 1:
824 case 2:
825 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
826 break;
827 }
828 }
829 }
830
TEST(L2,processors)831 TEST(L2, processors) {
832 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
833 switch (i) {
834 case 0:
835 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start);
836 ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_count);
837 break;
838 case 1:
839 ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_start);
840 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
841 break;
842 case 2:
843 ASSERT_EQ(6, cpuinfo_get_l2_cache(i)->processor_start);
844 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
845 break;
846 }
847 }
848 }
849
TEST(L3,none)850 TEST(L3, none) {
851 ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
852 ASSERT_FALSE(cpuinfo_get_l3_caches());
853 }
854
TEST(L4,none)855 TEST(L4, none) {
856 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
857 ASSERT_FALSE(cpuinfo_get_l4_caches());
858 }
859
860 #include <meizu-pro-7-plus.h>
861
main(int argc,char * argv[])862 int main(int argc, char* argv[]) {
863 #if CPUINFO_ARCH_ARM
864 cpuinfo_set_hwcap(UINT32_C(0x0037B0D6));
865 cpuinfo_set_hwcap2(UINT32_C(0x0000001F));
866 #elif CPUINFO_ARCH_ARM64
867 cpuinfo_set_hwcap(UINT32_C(0x000000FF));
868 #endif
869 cpuinfo_mock_filesystem(filesystem);
870 #ifdef __ANDROID__
871 cpuinfo_mock_android_properties(properties);
872 #endif
873 cpuinfo_initialize();
874 ::testing::InitGoogleTest(&argc, argv);
875 return RUN_ALL_TESTS();
876 }