1 /* 2 * Copyright © 2018 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 */ 24 25 #ifndef GPU_CMDS_H 26 #define GPU_CMDS_H 27 28 #include <intel_bufmgr.h> 29 #include <i915_drm.h> 30 31 #include "media_fill.h" 32 #include "gen7_media.h" 33 #include "gen8_media.h" 34 #include "intel_reg.h" 35 #include "drmtest.h" 36 #include "intel_batchbuffer.h" 37 #include "intel_chipset.h" 38 #include <assert.h> 39 40 void 41 gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end); 42 43 void 44 gen7_render_context_flush(struct intel_batchbuffer *batch, uint32_t batch_end); 45 46 uint32_t 47 gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch, 48 uint8_t color); 49 uint32_t 50 gen11_fill_curbe_buffer_data(struct intel_batchbuffer *batch); 51 52 uint32_t 53 gen7_fill_surface_state(struct intel_batchbuffer *batch, 54 const struct igt_buf *buf, 55 uint32_t format, 56 int is_dst); 57 58 uint32_t 59 gen7_fill_binding_table(struct intel_batchbuffer *batch, 60 const struct igt_buf *dst); 61 uint32_t 62 gen11_fill_binding_table(struct intel_batchbuffer *batch, 63 const struct igt_buf *src,const struct igt_buf *dst); 64 65 uint32_t 66 gen7_fill_kernel(struct intel_batchbuffer *batch, 67 const uint32_t kernel[][4], 68 size_t size); 69 70 uint32_t 71 gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, 72 const struct igt_buf *dst, 73 const uint32_t kernel[][4], 74 size_t size); 75 76 void 77 gen7_emit_state_base_address(struct intel_batchbuffer *batch); 78 79 void 80 gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads, 81 uint32_t urb_entries, uint32_t urb_size, 82 uint32_t curbe_size, uint32_t mode); 83 84 void 85 gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer); 86 87 void 88 gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, 89 uint32_t interface_descriptor); 90 91 void 92 gen7_emit_media_objects(struct intel_batchbuffer *batch, 93 unsigned int x, unsigned int y, 94 unsigned int width, unsigned int height); 95 96 void 97 gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch, 98 unsigned int x, unsigned int y, 99 unsigned int width, unsigned int height); 100 101 uint32_t 102 gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch, 103 uint32_t iters); 104 105 uint32_t 106 gen8_fill_surface_state(struct intel_batchbuffer *batch, 107 const struct igt_buf *buf, 108 uint32_t format, 109 int is_dst); 110 uint32_t 111 gen11_fill_surface_state(struct intel_batchbuffer *batch, 112 const struct igt_buf *buf, 113 uint32_t surface_type, 114 uint32_t format, 115 uint32_t vertical_alignment, 116 uint32_t horizontal_alignment, 117 int is_dst); 118 uint32_t 119 gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, 120 const struct igt_buf *dst, 121 const uint32_t kernel[][4], 122 size_t size); 123 uint32_t 124 gen11_fill_interface_descriptor(struct intel_batchbuffer *batch, 125 const struct igt_buf *src,const struct igt_buf *dst, 126 const uint32_t kernel[][4], 127 size_t size); 128 void 129 gen8_emit_state_base_address(struct intel_batchbuffer *batch); 130 131 void 132 gen8_emit_media_state_flush(struct intel_batchbuffer *batch); 133 134 void 135 gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads, 136 uint32_t urb_entries, uint32_t urb_size, 137 uint32_t curbe_size); 138 139 void 140 gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch, 141 unsigned int x, unsigned int y, 142 unsigned int width, unsigned int height); 143 144 void 145 gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset, 146 unsigned int yoffset); 147 148 void 149 gen9_emit_state_base_address(struct intel_batchbuffer *batch); 150 151 #endif /* GPU_CMDS_H */ 152