1 /*
2 * Copyright © 2007,2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #include <assert.h>
29 #include "instdone.h"
30
31 #include "intel_chipset.h"
32 #include "intel_reg.h"
33 #include "igt_core.h"
34
35 /* INSTDONE */
36 # define IDCT_DONE (1 << 30)
37 # define IQ_DONE (1 << 29)
38 # define PR_DONE (1 << 28)
39 # define VLD_DONE (1 << 27)
40 # define IP_DONE (1 << 26)
41 # define FBC_DONE (1 << 25)
42 # define BINNER_DONE (1 << 24)
43 # define SF_DONE (1 << 23)
44 # define SE_DONE (1 << 22)
45 # define WM_DONE (1 << 21)
46 # define IZ_DONE (1 << 20)
47 # define PERSPECTIVE_INTERP_DONE (1 << 19)
48 # define DISPATCHER_DONE (1 << 18)
49 # define PROJECTION_DONE (1 << 17)
50 # define DEPENDENT_ADDRESS_DONE (1 << 16)
51 # define QUAD_CACHE_DONE (1 << 15)
52 # define TEXTURE_FETCH_DONE (1 << 14)
53 # define TEXTURE_DECOMPRESS_DONE (1 << 13)
54 # define SAMPLER_CACHE_DONE (1 << 12)
55 # define FILTER_DONE (1 << 11)
56 # define BYPASS_FIFO_DONE (1 << 10)
57 # define PS_DONE (1 << 9)
58 # define CC_DONE (1 << 8)
59 # define MAP_FILTER_DONE (1 << 7)
60 # define MAP_L2_IDLE (1 << 6)
61 # define RING_2_ENABLE (1 << 2)
62 # define RING_1_ENABLE (1 << 1)
63 # define RING_0_ENABLE (1 << 0)
64
65 # define I830_GMBUS_DONE (1 << 26)
66 # define I830_FBC_DONE (1 << 25)
67 # define I830_BINNER_DONE (1 << 24)
68 # define I830_MPEG_DONE (1 << 23)
69 # define I830_MECO_DONE (1 << 22)
70 # define I830_MCD_DONE (1 << 21)
71 # define I830_MCSTP_DONE (1 << 20)
72 # define I830_CC_DONE (1 << 19)
73 # define I830_DG_DONE (1 << 18)
74 # define I830_DCMP_DONE (1 << 17)
75 # define I830_FTCH_DONE (1 << 16)
76 # define I830_IT_DONE (1 << 15)
77 # define I830_MG_DONE (1 << 14)
78 # define I830_MEC_DONE (1 << 13)
79 # define I830_PC_DONE (1 << 12)
80 # define I830_QCC_DONE (1 << 11)
81 # define I830_TB_DONE (1 << 10)
82 # define I830_WM_DONE (1 << 9)
83 # define I830_EF_DONE (1 << 8)
84 # define I830_BLITTER_DONE (1 << 7)
85 # define I830_MAP_L2_DONE (1 << 6)
86 # define I830_SECONDARY_RING_3_DONE (1 << 5)
87 # define I830_SECONDARY_RING_2_DONE (1 << 4)
88 # define I830_SECONDARY_RING_1_DONE (1 << 3)
89 # define I830_SECONDARY_RING_0_DONE (1 << 2)
90 # define I830_PRIMARY_RING_1_DONE (1 << 1)
91 # define I830_PRIMARY_RING_0_DONE (1 << 0)
92
93 /* INSTDONE_I965 */
94 # define I965_ROW_0_EU_0_DONE (1 << 31)
95 # define I965_ROW_0_EU_1_DONE (1 << 30)
96 # define I965_ROW_0_EU_2_DONE (1 << 29)
97 # define I965_ROW_0_EU_3_DONE (1 << 28)
98 # define I965_ROW_1_EU_0_DONE (1 << 27)
99 # define I965_ROW_1_EU_1_DONE (1 << 26)
100 # define I965_ROW_1_EU_2_DONE (1 << 25)
101 # define I965_ROW_1_EU_3_DONE (1 << 24)
102 # define I965_SF_DONE (1 << 23)
103 # define I965_SE_DONE (1 << 22)
104 # define I965_WM_DONE (1 << 21)
105 # define I965_DISPATCHER_DONE (1 << 18)
106 # define I965_PROJECTION_DONE (1 << 17)
107 # define I965_DG_DONE (1 << 16)
108 # define I965_QUAD_CACHE_DONE (1 << 15)
109 # define I965_TEXTURE_FETCH_DONE (1 << 14)
110 # define I965_TEXTURE_DECOMPRESS_DONE (1 << 13)
111 # define I965_SAMPLER_CACHE_DONE (1 << 12)
112 # define I965_FILTER_DONE (1 << 11)
113 # define I965_BYPASS_DONE (1 << 10)
114 # define I965_PS_DONE (1 << 9)
115 # define I965_CC_DONE (1 << 8)
116 # define I965_MAP_FILTER_DONE (1 << 7)
117 # define I965_MAP_L2_IDLE (1 << 6)
118 # define I965_MA_ROW_0_DONE (1 << 5)
119 # define I965_MA_ROW_1_DONE (1 << 4)
120 # define I965_IC_ROW_0_DONE (1 << 3)
121 # define I965_IC_ROW_1_DONE (1 << 2)
122 # define I965_CP_DONE (1 << 1)
123 # define I965_RING_0_ENABLE (1 << 0)
124
125 # define ILK_ROW_0_EU_0_DONE (1 << 31)
126 # define ILK_ROW_0_EU_1_DONE (1 << 30)
127 # define ILK_ROW_0_EU_2_DONE (1 << 29)
128 # define ILK_ROW_0_EU_3_DONE (1 << 28)
129 # define ILK_ROW_1_EU_0_DONE (1 << 27)
130 # define ILK_ROW_1_EU_1_DONE (1 << 26)
131 # define ILK_ROW_1_EU_2_DONE (1 << 25)
132 # define ILK_ROW_1_EU_3_DONE (1 << 24)
133 # define ILK_ROW_2_EU_0_DONE (1 << 23)
134 # define ILK_ROW_2_EU_1_DONE (1 << 22)
135 # define ILK_ROW_2_EU_2_DONE (1 << 21)
136 # define ILK_ROW_2_EU_3_DONE (1 << 20)
137 # define ILK_VCP_DONE (1 << 19)
138 # define ILK_ROW_0_MATH_DONE (1 << 18)
139 # define ILK_ROW_1_MATH_DONE (1 << 17)
140 # define ILK_ROW_2_MATH_DONE (1 << 16)
141 # define ILK_VC1_DONE (1 << 15)
142 # define ILK_ROW_0_MA_DONE (1 << 14)
143 # define ILK_ROW_1_MA_DONE (1 << 13)
144 # define ILK_ROW_2_MA_DONE (1 << 12)
145 # define ILK_ROW_0_ISC_DONE (1 << 11)
146 # define ILK_ROW_1_ISC_DONE (1 << 10)
147 # define ILK_ROW_2_ISC_DONE (1 << 9)
148 # define ILK_VFE_DONE (1 << 8)
149 # define ILK_TD_DONE (1 << 7)
150 # define ILK_SVTS_DONE (1 << 6)
151 # define ILK_TS_DONE (1 << 5)
152 # define ILK_GW_DONE (1 << 4)
153 # define ILK_AI_DONE (1 << 3)
154 # define ILK_AC_DONE (1 << 2)
155 # define ILK_AM_DONE (1 << 1)
156
157 # define GEN6_MA_3_DONE (1 << 31)
158 # define GEN6_EU_32_DONE (1 << 30)
159 # define GEN6_EU_31_DONE (1 << 29)
160 # define GEN6_EU_30_DONE (1 << 28)
161 # define GEN6_MA_2_DONE (1 << 27)
162 # define GEN6_EU_22_DONE (1 << 26)
163 # define GEN6_EU_21_DONE (1 << 25)
164 # define GEN6_EU_20_DONE (1 << 24)
165 # define GEN6_MA_1_DONE (1 << 23)
166 # define GEN6_EU_12_DONE (1 << 22)
167 # define GEN6_EU_11_DONE (1 << 21)
168 # define GEN6_EU_10_DONE (1 << 20)
169 # define GEN6_MA_0_DONE (1 << 19)
170 # define GEN6_EU_02_DONE (1 << 18)
171 # define GEN6_EU_01_DONE (1 << 17)
172 # define GEN6_EU_00_DONE (1 << 16)
173 # define GEN6_IC_3_DONE (1 << 15)
174 # define GEN6_IC_2_DONE (1 << 14)
175 # define GEN6_IC_1_DONE (1 << 13)
176 # define GEN6_IC_0_DONE (1 << 12)
177 # define GEN6_ISC_10_DONE (1 << 11)
178 # define GEN6_ISC_32_DONE (1 << 10)
179 # define GEN6_VSC_DONE (1 << 9)
180 # define GEN6_IEF_DONE (1 << 8)
181 # define GEN6_VFE_DONE (1 << 7)
182 # define GEN6_TD_DONE (1 << 6)
183 # define GEN6_TS_DONE (1 << 4)
184 # define GEN6_GW_DONE (1 << 3)
185 # define GEN6_HIZ_DONE (1 << 2)
186 # define GEN6_AVS_DONE (1 << 1)
187
188 /* INSTDONE_1 */
189 # define I965_GW_CS_DONE_CR (1 << 19)
190 # define I965_SVSM_CS_DONE_CR (1 << 18)
191 # define I965_SVDW_CS_DONE_CR (1 << 17)
192 # define I965_SVDR_CS_DONE_CR (1 << 16)
193 # define I965_SVRW_CS_DONE_CR (1 << 15)
194 # define I965_SVRR_CS_DONE_CR (1 << 14)
195 # define I965_SVTW_CS_DONE_CR (1 << 13)
196 # define I965_MASM_CS_DONE_CR (1 << 12)
197 # define I965_MASF_CS_DONE_CR (1 << 11)
198 # define I965_MAW_CS_DONE_CR (1 << 10)
199 # define I965_EM1_CS_DONE_CR (1 << 9)
200 # define I965_EM0_CS_DONE_CR (1 << 8)
201 # define I965_UC1_CS_DONE (1 << 7)
202 # define I965_UC0_CS_DONE (1 << 6)
203 # define I965_URB_CS_DONE (1 << 5)
204 # define I965_ISC_CS_DONE (1 << 4)
205 # define I965_CL_CS_DONE (1 << 3)
206 # define I965_GS_CS_DONE (1 << 2)
207 # define I965_VS0_CS_DONE (1 << 1)
208 # define I965_VF_CS_DONE (1 << 0)
209
210 # define G4X_BCS_DONE (1 << 31)
211 # define G4X_CS_DONE (1 << 30)
212 # define G4X_MASF_DONE (1 << 29)
213 # define G4X_SVDW_DONE (1 << 28)
214 # define G4X_SVDR_DONE (1 << 27)
215 # define G4X_SVRW_DONE (1 << 26)
216 # define G4X_SVRR_DONE (1 << 25)
217 # define G4X_ISC_DONE (1 << 24)
218 # define G4X_MT_DONE (1 << 23)
219 # define G4X_RC_DONE (1 << 22)
220 # define G4X_DAP_DONE (1 << 21)
221 # define G4X_MAWB_DONE (1 << 20)
222 # define G4X_MT_IDLE (1 << 19)
223 # define G4X_GBLT_BUSY (1 << 18)
224 # define G4X_SVSM_DONE (1 << 17)
225 # define G4X_MASM_DONE (1 << 16)
226 # define G4X_QC_DONE (1 << 15)
227 # define G4X_FL_DONE (1 << 14)
228 # define G4X_SC_DONE (1 << 13)
229 # define G4X_DM_DONE (1 << 12)
230 # define G4X_FT_DONE (1 << 11)
231 # define G4X_DG_DONE (1 << 10)
232 # define G4X_SI_DONE (1 << 9)
233 # define G4X_SO_DONE (1 << 8)
234 # define G4X_PL_DONE (1 << 7)
235 # define G4X_WIZ_DONE (1 << 6)
236 # define G4X_URB_DONE (1 << 5)
237 # define G4X_SF_DONE (1 << 4)
238 # define G4X_CL_DONE (1 << 3)
239 # define G4X_GS_DONE (1 << 2)
240 # define G4X_VS0_DONE (1 << 1)
241 # define G4X_VF_DONE (1 << 0)
242
243 /* INSTDONE_1 */
244 # define GEN6_GAM_DONE (1 << 31)
245 # define GEN6_CS_DONE (1 << 30)
246 # define GEN6_WMBE_DONE (1 << 29)
247 # define GEN6_SVRW_DONE (1 << 28)
248 # define GEN6_RCC_DONE (1 << 27)
249 # define GEN6_SVG_DONE (1 << 26)
250 # define GEN6_ISC_DONE (1 << 25)
251 # define GEN6_MT_DONE (1 << 24)
252 # define GEN6_RCPFE_DONE (1 << 23)
253 # define GEN6_RCPBE_DONE (1 << 22)
254 # define GEN6_VDI_DONE (1 << 21)
255 # define GEN6_RCZ_DONE (1 << 20)
256 # define GEN6_DAP_DONE (1 << 19)
257 # define GEN6_PSD_DONE (1 << 18)
258 # define GEN6_IZ_DONE (1 << 17)
259 # define GEN6_WMFE_DONE (1 << 16)
260 # define GEN6_SVSM_DONE (1 << 15)
261 # define GEN6_QC_DONE (1 << 14)
262 # define GEN6_FL_DONE (1 << 13)
263 # define GEN6_SC_DONE (1 << 12)
264 # define GEN6_DM_DONE (1 << 11)
265 # define GEN6_FT_DONE (1 << 10)
266 # define GEN6_DG_DONE (1 << 9)
267 # define GEN6_SI_DONE (1 << 8)
268 # define GEN6_SO_DONE (1 << 7)
269 # define GEN6_PL_DONE (1 << 6)
270 # define GEN6_VME_DONE (1 << 5)
271 # define GEN6_SF_DONE (1 << 4)
272 # define GEN6_CL_DONE (1 << 3)
273 # define GEN6_GS_DONE (1 << 2)
274 # define GEN6_VS0_DONE (1 << 1)
275 # define GEN6_VF_DONE (1 << 0)
276
277 struct instdone_bit instdone_bits[MAX_INSTDONE_BITS];
278 int num_instdone_bits = 0;
279
280 static void
add_instdone_bit(uint32_t reg,uint32_t bit,const char * name)281 add_instdone_bit(uint32_t reg, uint32_t bit, const char *name)
282 {
283 igt_assert(num_instdone_bits < MAX_INSTDONE_BITS);
284 instdone_bits[num_instdone_bits].reg = reg;
285 instdone_bits[num_instdone_bits].bit = bit;
286 instdone_bits[num_instdone_bits].name = name;
287 num_instdone_bits++;
288 }
289
290 static void
gen3_instdone_bit(uint32_t bit,const char * name)291 gen3_instdone_bit(uint32_t bit, const char *name)
292 {
293 add_instdone_bit(INSTDONE, bit, name);
294 }
295
296 static void
gen4_instdone_bit(uint32_t bit,const char * name)297 gen4_instdone_bit(uint32_t bit, const char *name)
298 {
299 add_instdone_bit(INSTDONE_I965, bit, name);
300 }
301
302 static void
gen4_instdone1_bit(uint32_t bit,const char * name)303 gen4_instdone1_bit(uint32_t bit, const char *name)
304 {
305 add_instdone_bit(INSTDONE_1, bit, name);
306 }
307
308 static void
gen6_instdone1_bit(uint32_t bit,const char * name)309 gen6_instdone1_bit(uint32_t bit, const char *name)
310 {
311 add_instdone_bit(INSTDONE_I965, bit, name);
312 }
313
314 static void
gen6_instdone2_bit(uint32_t bit,const char * name)315 gen6_instdone2_bit(uint32_t bit, const char *name)
316 {
317 add_instdone_bit(INSTDONE_1, bit, name);
318 }
319
320 static void
init_g965_instdone1(void)321 init_g965_instdone1(void)
322 {
323 gen4_instdone1_bit(I965_GW_CS_DONE_CR, "GW CS CR");
324 gen4_instdone1_bit(I965_SVSM_CS_DONE_CR, "SVSM CS CR");
325 gen4_instdone1_bit(I965_SVDW_CS_DONE_CR, "SVDW CS CR");
326 gen4_instdone1_bit(I965_SVDR_CS_DONE_CR, "SVDR CS CR");
327 gen4_instdone1_bit(I965_SVRW_CS_DONE_CR, "SVRW CS CR");
328 gen4_instdone1_bit(I965_SVRR_CS_DONE_CR, "SVRR CS CR");
329 gen4_instdone1_bit(I965_SVTW_CS_DONE_CR, "SVTW CS CR");
330 gen4_instdone1_bit(I965_MASM_CS_DONE_CR, "MASM CS CR");
331 gen4_instdone1_bit(I965_MASF_CS_DONE_CR, "MASF CS CR");
332 gen4_instdone1_bit(I965_MAW_CS_DONE_CR, "MAW CS CR");
333 gen4_instdone1_bit(I965_EM1_CS_DONE_CR, "EM1 CS CR");
334 gen4_instdone1_bit(I965_EM0_CS_DONE_CR, "EM0 CS CR");
335 gen4_instdone1_bit(I965_UC1_CS_DONE, "UC1 CS");
336 gen4_instdone1_bit(I965_UC0_CS_DONE, "UC0 CS");
337 gen4_instdone1_bit(I965_URB_CS_DONE, "URB CS");
338 gen4_instdone1_bit(I965_ISC_CS_DONE, "ISC CS");
339 gen4_instdone1_bit(I965_CL_CS_DONE, "CL CS");
340 gen4_instdone1_bit(I965_GS_CS_DONE, "GS CS");
341 gen4_instdone1_bit(I965_VS0_CS_DONE, "VS0 CS");
342 gen4_instdone1_bit(I965_VF_CS_DONE, "VF CS");
343 }
344
345 static void
init_g4x_instdone1(void)346 init_g4x_instdone1(void)
347 {
348 gen4_instdone1_bit(G4X_BCS_DONE, "BCS");
349 gen4_instdone1_bit(G4X_CS_DONE, "CS");
350 gen4_instdone1_bit(G4X_MASF_DONE, "MASF");
351 gen4_instdone1_bit(G4X_SVDW_DONE, "SVDW");
352 gen4_instdone1_bit(G4X_SVDR_DONE, "SVDR");
353 gen4_instdone1_bit(G4X_SVRW_DONE, "SVRW");
354 gen4_instdone1_bit(G4X_SVRR_DONE, "SVRR");
355 gen4_instdone1_bit(G4X_ISC_DONE, "ISC");
356 gen4_instdone1_bit(G4X_MT_DONE, "MT");
357 gen4_instdone1_bit(G4X_RC_DONE, "RC");
358 gen4_instdone1_bit(G4X_DAP_DONE, "DAP");
359 gen4_instdone1_bit(G4X_MAWB_DONE, "MAWB");
360 gen4_instdone1_bit(G4X_MT_IDLE, "MT idle");
361 //gen4_instdone1_bit(G4X_GBLT_BUSY, "GBLT");
362 gen4_instdone1_bit(G4X_SVSM_DONE, "SVSM");
363 gen4_instdone1_bit(G4X_MASM_DONE, "MASM");
364 gen4_instdone1_bit(G4X_QC_DONE, "QC");
365 gen4_instdone1_bit(G4X_FL_DONE, "FL");
366 gen4_instdone1_bit(G4X_SC_DONE, "SC");
367 gen4_instdone1_bit(G4X_DM_DONE, "DM");
368 gen4_instdone1_bit(G4X_FT_DONE, "FT");
369 gen4_instdone1_bit(G4X_DG_DONE, "DG");
370 gen4_instdone1_bit(G4X_SI_DONE, "SI");
371 gen4_instdone1_bit(G4X_SO_DONE, "SO");
372 gen4_instdone1_bit(G4X_PL_DONE, "PL");
373 gen4_instdone1_bit(G4X_WIZ_DONE, "WIZ");
374 gen4_instdone1_bit(G4X_URB_DONE, "URB");
375 gen4_instdone1_bit(G4X_SF_DONE, "SF");
376 gen4_instdone1_bit(G4X_CL_DONE, "CL");
377 gen4_instdone1_bit(G4X_GS_DONE, "GS");
378 gen4_instdone1_bit(G4X_VS0_DONE, "VS0");
379 gen4_instdone1_bit(G4X_VF_DONE, "VF");
380 }
381
382 static void
init_gen7_instdone(void)383 init_gen7_instdone(void)
384 {
385 gen6_instdone1_bit(1 << 19, "GAM");
386 gen6_instdone1_bit(1 << 18, "GAFM");
387 gen6_instdone1_bit(1 << 17, "TSG");
388 gen6_instdone1_bit(1 << 16, "VFE");
389 gen6_instdone1_bit(1 << 15, "GAFS");
390 gen6_instdone1_bit(1 << 14, "SVG");
391 gen6_instdone1_bit(1 << 13, "URBM");
392 gen6_instdone1_bit(1 << 12, "TDG");
393 gen6_instdone1_bit(1 << 9, "SF");
394 gen6_instdone1_bit(1 << 8, "CL");
395 gen6_instdone1_bit(1 << 7, "SOL");
396 gen6_instdone1_bit(1 << 6, "GS");
397 gen6_instdone1_bit(1 << 5, "DS");
398 gen6_instdone1_bit(1 << 4, "TE");
399 gen6_instdone1_bit(1 << 3, "HS");
400 gen6_instdone1_bit(1 << 2, "VS");
401 gen6_instdone1_bit(1 << 1, "VF");
402 }
403
404 static void
init_gen75_instdone(void)405 init_gen75_instdone(void)
406 {
407 gen6_instdone1_bit(1 << 21, "CS");
408 gen6_instdone1_bit(1 << 20, "RS");
409 init_gen7_instdone();
410 }
411
412 static void
init_gen8_instdone(void)413 init_gen8_instdone(void)
414 {
415 gen6_instdone1_bit(1 << 23, "FBC");
416 gen6_instdone1_bit(1 << 22, "SDE");
417 init_gen75_instdone();
418 }
419
420 static void
init_gen11_instdone(void)421 init_gen11_instdone(void)
422 {
423 gen6_instdone1_bit(1 << 24, "TSG1");
424 gen6_instdone1_bit(1 << 11, "TDG1");
425 init_gen8_instdone();
426 }
427
428 bool
init_instdone_definitions(uint32_t devid)429 init_instdone_definitions(uint32_t devid)
430 {
431 if (IS_GEN11(devid)) {
432 init_gen11_instdone();
433 } else if (IS_GEN8(devid) || IS_GEN9(devid) || IS_GEN10(devid)) {
434 init_gen8_instdone();
435 } else if (IS_GEN7(devid)) {
436 init_gen7_instdone();
437 } else if (IS_GEN6(devid)) {
438 /* Now called INSTDONE_1 in the docs. */
439 gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 3");
440 gen6_instdone1_bit(GEN6_EU_32_DONE, "EU 32");
441 gen6_instdone1_bit(GEN6_EU_31_DONE, "EU 31");
442 gen6_instdone1_bit(GEN6_EU_30_DONE, "EU 30");
443 gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 2");
444 gen6_instdone1_bit(GEN6_EU_22_DONE, "EU 22");
445 gen6_instdone1_bit(GEN6_EU_21_DONE, "EU 21");
446 gen6_instdone1_bit(GEN6_EU_20_DONE, "EU 20");
447 gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 1");
448 gen6_instdone1_bit(GEN6_EU_12_DONE, "EU 12");
449 gen6_instdone1_bit(GEN6_EU_11_DONE, "EU 11");
450 gen6_instdone1_bit(GEN6_EU_10_DONE, "EU 10");
451 gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 0");
452 gen6_instdone1_bit(GEN6_EU_02_DONE, "EU 02");
453 gen6_instdone1_bit(GEN6_EU_01_DONE, "EU 01");
454 gen6_instdone1_bit(GEN6_EU_00_DONE, "EU 00");
455
456 gen6_instdone1_bit(GEN6_IC_3_DONE, "IC 3");
457 gen6_instdone1_bit(GEN6_IC_2_DONE, "IC 2");
458 gen6_instdone1_bit(GEN6_IC_1_DONE, "IC 1");
459 gen6_instdone1_bit(GEN6_IC_0_DONE, "IC 0");
460 gen6_instdone1_bit(GEN6_ISC_10_DONE, "ISC 1/0");
461 gen6_instdone1_bit(GEN6_ISC_32_DONE, "ISC 3/2");
462
463 gen6_instdone1_bit(GEN6_VSC_DONE, "VSC");
464 gen6_instdone1_bit(GEN6_IEF_DONE, "IEF");
465 gen6_instdone1_bit(GEN6_VFE_DONE, "VFE");
466 gen6_instdone1_bit(GEN6_TD_DONE, "TD");
467 gen6_instdone1_bit(GEN6_TS_DONE, "TS");
468 gen6_instdone1_bit(GEN6_GW_DONE, "GW");
469 gen6_instdone1_bit(GEN6_HIZ_DONE, "HIZ");
470 gen6_instdone1_bit(GEN6_AVS_DONE, "AVS");
471
472 /* Now called INSTDONE_2 in the docs. */
473 gen6_instdone2_bit(GEN6_GAM_DONE, "GAM");
474 gen6_instdone2_bit(GEN6_CS_DONE, "CS");
475 gen6_instdone2_bit(GEN6_WMBE_DONE, "WMBE");
476 gen6_instdone2_bit(GEN6_SVRW_DONE, "SVRW");
477 gen6_instdone2_bit(GEN6_RCC_DONE, "RCC");
478 gen6_instdone2_bit(GEN6_SVG_DONE, "SVG");
479 gen6_instdone2_bit(GEN6_ISC_DONE, "ISC");
480 gen6_instdone2_bit(GEN6_MT_DONE, "MT");
481 gen6_instdone2_bit(GEN6_RCPFE_DONE, "RCPFE");
482 gen6_instdone2_bit(GEN6_RCPBE_DONE, "RCPBE");
483 gen6_instdone2_bit(GEN6_VDI_DONE, "VDI");
484 gen6_instdone2_bit(GEN6_RCZ_DONE, "RCZ");
485 gen6_instdone2_bit(GEN6_DAP_DONE, "DAP");
486 gen6_instdone2_bit(GEN6_PSD_DONE, "PSD");
487 gen6_instdone2_bit(GEN6_IZ_DONE, "IZ");
488 gen6_instdone2_bit(GEN6_WMFE_DONE, "WMFE");
489 gen6_instdone2_bit(GEN6_SVSM_DONE, "SVSM");
490 gen6_instdone2_bit(GEN6_QC_DONE, "QC");
491 gen6_instdone2_bit(GEN6_FL_DONE, "FL");
492 gen6_instdone2_bit(GEN6_SC_DONE, "SC");
493 gen6_instdone2_bit(GEN6_DM_DONE, "DM");
494 gen6_instdone2_bit(GEN6_FT_DONE, "FT");
495 gen6_instdone2_bit(GEN6_DG_DONE, "DG");
496 gen6_instdone2_bit(GEN6_SI_DONE, "SI");
497 gen6_instdone2_bit(GEN6_SO_DONE, "SO");
498 gen6_instdone2_bit(GEN6_PL_DONE, "PL");
499 gen6_instdone2_bit(GEN6_VME_DONE, "VME");
500 gen6_instdone2_bit(GEN6_SF_DONE, "SF");
501 gen6_instdone2_bit(GEN6_CL_DONE, "CL");
502 gen6_instdone2_bit(GEN6_GS_DONE, "GS");
503 gen6_instdone2_bit(GEN6_VS0_DONE, "VS0");
504 gen6_instdone2_bit(GEN6_VF_DONE, "VF");
505 } else if (IS_GEN5(devid)) {
506 gen4_instdone_bit(ILK_ROW_0_EU_0_DONE, "Row 0, EU 0");
507 gen4_instdone_bit(ILK_ROW_0_EU_1_DONE, "Row 0, EU 1");
508 gen4_instdone_bit(ILK_ROW_0_EU_2_DONE, "Row 0, EU 2");
509 gen4_instdone_bit(ILK_ROW_0_EU_3_DONE, "Row 0, EU 3");
510 gen4_instdone_bit(ILK_ROW_1_EU_0_DONE, "Row 1, EU 0");
511 gen4_instdone_bit(ILK_ROW_1_EU_1_DONE, "Row 1, EU 1");
512 gen4_instdone_bit(ILK_ROW_1_EU_2_DONE, "Row 1, EU 2");
513 gen4_instdone_bit(ILK_ROW_1_EU_3_DONE, "Row 1, EU 3");
514 gen4_instdone_bit(ILK_ROW_2_EU_0_DONE, "Row 2, EU 0");
515 gen4_instdone_bit(ILK_ROW_2_EU_1_DONE, "Row 2, EU 1");
516 gen4_instdone_bit(ILK_ROW_2_EU_2_DONE, "Row 2, EU 2");
517 gen4_instdone_bit(ILK_ROW_2_EU_3_DONE, "Row 2, EU 3");
518 gen4_instdone_bit(ILK_VCP_DONE, "VCP");
519 gen4_instdone_bit(ILK_ROW_0_MATH_DONE, "Row 0 math");
520 gen4_instdone_bit(ILK_ROW_1_MATH_DONE, "Row 1 math");
521 gen4_instdone_bit(ILK_ROW_2_MATH_DONE, "Row 2 math");
522 gen4_instdone_bit(ILK_VC1_DONE, "VC1");
523 gen4_instdone_bit(ILK_ROW_0_MA_DONE, "Row 0 MA");
524 gen4_instdone_bit(ILK_ROW_1_MA_DONE, "Row 1 MA");
525 gen4_instdone_bit(ILK_ROW_2_MA_DONE, "Row 2 MA");
526 gen4_instdone_bit(ILK_ROW_0_ISC_DONE, "Row 0 ISC");
527 gen4_instdone_bit(ILK_ROW_1_ISC_DONE, "Row 1 ISC");
528 gen4_instdone_bit(ILK_ROW_2_ISC_DONE, "Row 2 ISC");
529 gen4_instdone_bit(ILK_VFE_DONE, "VFE");
530 gen4_instdone_bit(ILK_TD_DONE, "TD");
531 gen4_instdone_bit(ILK_SVTS_DONE, "SVTS");
532 gen4_instdone_bit(ILK_TS_DONE, "TS");
533 gen4_instdone_bit(ILK_GW_DONE, "GW");
534 gen4_instdone_bit(ILK_AI_DONE, "AI");
535 gen4_instdone_bit(ILK_AC_DONE, "AC");
536 gen4_instdone_bit(ILK_AM_DONE, "AM");
537
538 init_g4x_instdone1();
539 } else if (IS_GEN4(devid)) {
540 gen4_instdone_bit(I965_ROW_0_EU_0_DONE, "Row 0, EU 0");
541 gen4_instdone_bit(I965_ROW_0_EU_1_DONE, "Row 0, EU 1");
542 gen4_instdone_bit(I965_ROW_0_EU_2_DONE, "Row 0, EU 2");
543 gen4_instdone_bit(I965_ROW_0_EU_3_DONE, "Row 0, EU 3");
544 gen4_instdone_bit(I965_ROW_1_EU_0_DONE, "Row 1, EU 0");
545 gen4_instdone_bit(I965_ROW_1_EU_1_DONE, "Row 1, EU 1");
546 gen4_instdone_bit(I965_ROW_1_EU_2_DONE, "Row 1, EU 2");
547 gen4_instdone_bit(I965_ROW_1_EU_3_DONE, "Row 1, EU 3");
548 gen4_instdone_bit(I965_SF_DONE, "Strips and Fans");
549 gen4_instdone_bit(I965_SE_DONE, "Setup Engine");
550 gen4_instdone_bit(I965_WM_DONE, "Windowizer");
551 gen4_instdone_bit(I965_DISPATCHER_DONE, "Dispatcher");
552 gen4_instdone_bit(I965_PROJECTION_DONE, "Projection and LOD");
553 gen4_instdone_bit(I965_DG_DONE, "Dependent address generator");
554 gen4_instdone_bit(I965_QUAD_CACHE_DONE, "Texture fetch");
555 gen4_instdone_bit(I965_TEXTURE_FETCH_DONE, "Texture fetch");
556 gen4_instdone_bit(I965_TEXTURE_DECOMPRESS_DONE, "Texture decompress");
557 gen4_instdone_bit(I965_SAMPLER_CACHE_DONE, "Sampler cache");
558 gen4_instdone_bit(I965_FILTER_DONE, "Filtering");
559 gen4_instdone_bit(I965_BYPASS_DONE, "Bypass FIFO");
560 gen4_instdone_bit(I965_PS_DONE, "Pixel shader");
561 gen4_instdone_bit(I965_CC_DONE, "Color calculator");
562 gen4_instdone_bit(I965_MAP_FILTER_DONE, "Map filter");
563 gen4_instdone_bit(I965_MAP_L2_IDLE, "Map L2");
564 gen4_instdone_bit(I965_MA_ROW_0_DONE, "Message Arbiter row 0");
565 gen4_instdone_bit(I965_MA_ROW_1_DONE, "Message Arbiter row 1");
566 gen4_instdone_bit(I965_IC_ROW_0_DONE, "Instruction cache row 0");
567 gen4_instdone_bit(I965_IC_ROW_1_DONE, "Instruction cache row 1");
568 gen4_instdone_bit(I965_CP_DONE, "Command Processor");
569
570 if (IS_G4X(devid)) {
571 init_g4x_instdone1();
572 } else {
573 init_g965_instdone1();
574 }
575 } else if (IS_GEN3(devid)) {
576 gen3_instdone_bit(IDCT_DONE, "IDCT");
577 gen3_instdone_bit(IQ_DONE, "IQ");
578 gen3_instdone_bit(PR_DONE, "PR");
579 gen3_instdone_bit(VLD_DONE, "VLD");
580 gen3_instdone_bit(IP_DONE, "Instruction parser");
581 gen3_instdone_bit(FBC_DONE, "Framebuffer Compression");
582 gen3_instdone_bit(BINNER_DONE, "Binner");
583 gen3_instdone_bit(SF_DONE, "Strips and fans");
584 gen3_instdone_bit(SE_DONE, "Setup engine");
585 gen3_instdone_bit(WM_DONE, "Windowizer");
586 gen3_instdone_bit(IZ_DONE, "Intermediate Z");
587 gen3_instdone_bit(PERSPECTIVE_INTERP_DONE, "Perspective interpolation");
588 gen3_instdone_bit(DISPATCHER_DONE, "Dispatcher");
589 gen3_instdone_bit(PROJECTION_DONE, "Projection and LOD");
590 gen3_instdone_bit(DEPENDENT_ADDRESS_DONE, "Dependent address calculation");
591 gen3_instdone_bit(TEXTURE_FETCH_DONE, "Texture fetch");
592 gen3_instdone_bit(TEXTURE_DECOMPRESS_DONE, "Texture decompression");
593 gen3_instdone_bit(SAMPLER_CACHE_DONE, "Sampler Cache");
594 gen3_instdone_bit(FILTER_DONE, "Filtering");
595 gen3_instdone_bit(BYPASS_FIFO_DONE, "Bypass FIFO");
596 gen3_instdone_bit(PS_DONE, "Pixel shader");
597 gen3_instdone_bit(CC_DONE, "Color calculator");
598 gen3_instdone_bit(MAP_FILTER_DONE, "Map filter");
599 gen3_instdone_bit(MAP_L2_IDLE, "Map L2");
600 } else if (IS_GEN2(devid)) {
601 gen3_instdone_bit(I830_GMBUS_DONE, "GMBUS");
602 gen3_instdone_bit(I830_FBC_DONE, "FBC");
603 gen3_instdone_bit(I830_BINNER_DONE, "BINNER");
604 gen3_instdone_bit(I830_MPEG_DONE, "MPEG");
605 gen3_instdone_bit(I830_MECO_DONE, "MECO");
606 gen3_instdone_bit(I830_MCD_DONE, "MCD");
607 gen3_instdone_bit(I830_MCSTP_DONE, "MCSTP");
608 gen3_instdone_bit(I830_CC_DONE, "CC");
609 gen3_instdone_bit(I830_DG_DONE, "DG");
610 gen3_instdone_bit(I830_DCMP_DONE, "DCMP");
611 gen3_instdone_bit(I830_FTCH_DONE, "FTCH");
612 gen3_instdone_bit(I830_IT_DONE, "IT");
613 gen3_instdone_bit(I830_MG_DONE, "MG");
614 gen3_instdone_bit(I830_MEC_DONE, "MEC");
615 gen3_instdone_bit(I830_PC_DONE, "PC");
616 gen3_instdone_bit(I830_QCC_DONE, "QCC");
617 gen3_instdone_bit(I830_TB_DONE, "TB");
618 gen3_instdone_bit(I830_WM_DONE, "WM");
619 gen3_instdone_bit(I830_EF_DONE, "EF");
620 gen3_instdone_bit(I830_BLITTER_DONE, "Blitter");
621 gen3_instdone_bit(I830_MAP_L2_DONE, "Map L2 cache");
622 gen3_instdone_bit(I830_SECONDARY_RING_3_DONE, "Secondary ring 3");
623 gen3_instdone_bit(I830_SECONDARY_RING_2_DONE, "Secondary ring 2");
624 gen3_instdone_bit(I830_SECONDARY_RING_1_DONE, "Secondary ring 1");
625 gen3_instdone_bit(I830_SECONDARY_RING_0_DONE, "Secondary ring 0");
626 gen3_instdone_bit(I830_PRIMARY_RING_1_DONE, "Primary ring 1");
627 gen3_instdone_bit(I830_PRIMARY_RING_0_DONE, "Primary ring 0");
628 } else
629 return false;
630
631 return true;
632 }
633