1 /*
2 * Copyright © 2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Jesse Barnes <jbarnes@virtuousgeek.org> (based on gem_bad_blit.c)
26 *
27 */
28
29 #include "igt.h"
30 #include <stdlib.h>
31 #include <stdio.h>
32 #include <string.h>
33 #include <fcntl.h>
34 #include <inttypes.h>
35 #include <errno.h>
36 #include <sys/stat.h>
37 #include <sys/time.h>
38 #include "drm.h"
39 #include "intel_bufmgr.h"
40
41 static drm_intel_bufmgr *bufmgr;
42 struct intel_batchbuffer *batch;
43 static int bad_pipe;
44
45 static void
gpu_hang(void)46 gpu_hang(void)
47 {
48 int cmd;
49
50 cmd = bad_pipe ? MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW :
51 MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW;
52
53 BEGIN_BATCH(6, 0);
54 /* The documentation says that the LOAD_SCAN_LINES command
55 * always comes in pairs. Don't ask me why. */
56 OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | (bad_pipe << 20));
57 OUT_BATCH((0 << 16) | 2048);
58 OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | (bad_pipe << 20));
59 OUT_BATCH((0 << 16) | 2048);
60 OUT_BATCH(MI_WAIT_FOR_EVENT | cmd);
61 OUT_BATCH(MI_NOOP);
62 ADVANCE_BATCH();
63
64 intel_batchbuffer_flush(batch);
65 }
66
opt_handler(int opt,int opt_index,void * data)67 static int opt_handler(int opt, int opt_index, void *data)
68 {
69 switch (opt) {
70 case 'p':
71 bad_pipe = atoi(optarg);
72 break;
73 default:
74 return IGT_OPT_HANDLER_ERROR;
75 }
76
77 return IGT_OPT_HANDLER_SUCCESS;
78 }
79
80 const char *help_str = " -p\tDisabled pipe number\n";
81
82 igt_simple_main_args("p:", NULL, help_str, opt_handler, NULL)
83 {
84 int fd;
85
86 fd = drm_open_driver(DRIVER_INTEL);
87
88 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
89 drm_intel_bufmgr_gem_enable_reuse(bufmgr);
90 batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
91
92 gpu_hang();
93
94 intel_batchbuffer_free(batch);
95 drm_intel_bufmgr_destroy(bufmgr);
96
97 close(fd);
98 }
99