1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Tvrtko Ursulin <tvrtko.ursulin@intel.com>
25 *
26 */
27
28 /** @file gem_request_retire
29 *
30 * Collection of tests targeting request retirement code paths.
31 */
32
33 #include "igt.h"
34 #include <stdlib.h>
35 #include <stdio.h>
36 #include <string.h>
37 #include <fcntl.h>
38 #include <inttypes.h>
39 #include <errno.h>
40 #include <sys/stat.h>
41 #include <sys/time.h>
42 #include <sys/mman.h>
43 #include <signal.h>
44 #include <pthread.h>
45 #include <time.h>
46
47 #include "drm.h"
48 #include "i915_drm.h"
49
50 #include "intel_bufmgr.h"
51
52 IGT_TEST_DESCRIPTION("Collection of tests targeting request retirement code"
53 " paths.");
54
55 #define WIDTH 4096
56 #define HEIGHT 4096
57 #define BO_SIZE (WIDTH * HEIGHT * sizeof(uint32_t))
58
59 static uint32_t
blit(int fd,uint32_t dst,uint32_t src,uint32_t ctx_id)60 blit(int fd, uint32_t dst, uint32_t src, uint32_t ctx_id)
61 {
62 const unsigned int copies = 1000;
63 uint32_t batch[12 * copies + 5];
64 struct drm_i915_gem_relocation_entry reloc[2 * copies];
65 struct drm_i915_gem_exec_object2 obj[3];
66 struct drm_i915_gem_execbuffer2 exec;
67 uint32_t handle;
68 unsigned int i = 0, j, r = 0;
69
70 for (j = 0; j < copies; j++) {
71 reloc[r].target_handle = dst;
72 reloc[r].delta = 0;
73 reloc[r].offset = (i + 4) * sizeof(uint32_t);
74 reloc[r].presumed_offset = 0;
75 reloc[r].read_domains = I915_GEM_DOMAIN_RENDER;
76 reloc[r].write_domain = I915_GEM_DOMAIN_RENDER;
77
78 r++;
79
80 reloc[r].target_handle = src;
81 reloc[r].delta = 0;
82 reloc[r].offset = (i + 7) * sizeof(uint32_t);
83 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
84 reloc[r].offset += sizeof(uint32_t);
85 reloc[r].presumed_offset = 0;
86 reloc[r].read_domains = I915_GEM_DOMAIN_RENDER;
87 reloc[r].write_domain = 0;
88
89 r++;
90
91 batch[i++] = XY_SRC_COPY_BLT_CMD |
92 XY_SRC_COPY_BLT_WRITE_ALPHA |
93 XY_SRC_COPY_BLT_WRITE_RGB;
94 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
95 batch[i - 1] |= 8;
96 else
97 batch[i - 1] |= 6;
98
99 batch[i++] = (3 << 24) | /* 32 bits */
100 (0xcc << 16) | /* copy ROP */
101 WIDTH*4;
102 batch[i++] = 0; /* dst x1,y1 */
103 batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */
104 batch[i++] = 0; /* dst reloc */
105 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
106 batch[i++] = 0;
107 batch[i++] = 0; /* src x1,y1 */
108 batch[i++] = WIDTH*4;
109 batch[i++] = 0; /* src reloc */
110 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
111 batch[i++] = 0;
112 }
113
114 batch[i++] = MI_BATCH_BUFFER_END;
115
116 while (i % 4)
117 batch[i++] = MI_NOOP;
118
119 handle = gem_create(fd, sizeof(batch));
120 gem_write(fd, handle, 0, batch, sizeof(batch));
121
122 memset(obj, 0, sizeof(obj));
123 memset(&exec, 0, sizeof(exec));
124
125 obj[exec.buffer_count++].handle = dst;
126 if (src != dst)
127 obj[exec.buffer_count++].handle = src;
128 obj[exec.buffer_count].handle = handle;
129 obj[exec.buffer_count].relocation_count = 2 * copies;
130 obj[exec.buffer_count].relocs_ptr = to_user_pointer(reloc);
131 exec.buffer_count++;
132 exec.buffers_ptr = to_user_pointer(obj);
133
134 exec.batch_len = i * sizeof(uint32_t);
135 exec.flags = I915_EXEC_BLT;
136 i915_execbuffer2_set_context_id(exec, ctx_id);
137
138 gem_execbuf(fd, &exec);
139
140 return handle;
141 }
142
143 static uint32_t
noop(int fd,uint32_t src,uint32_t ctx_id)144 noop(int fd, uint32_t src, uint32_t ctx_id)
145 {
146 uint32_t batch[4];
147 struct drm_i915_gem_exec_object2 obj[2];
148 struct drm_i915_gem_execbuffer2 exec;
149 uint32_t handle;
150 unsigned int i = 0;
151
152 batch[i++] = MI_NOOP;
153 batch[i++] = MI_BATCH_BUFFER_END;
154 batch[i++] = MI_NOOP;
155 batch[i++] = MI_NOOP;
156
157 handle = gem_create(fd, 4096);
158 gem_write(fd, handle, 0, batch, sizeof(batch));
159
160 memset(obj, 0, sizeof(obj));
161 memset(&exec, 0, sizeof(exec));
162
163 obj[exec.buffer_count++].handle = src;
164 obj[exec.buffer_count].handle = handle;
165 obj[exec.buffer_count].relocation_count = 0;
166 obj[exec.buffer_count].relocs_ptr = to_user_pointer(0);
167 exec.buffer_count++;
168 exec.buffers_ptr = to_user_pointer(obj);
169
170 exec.batch_len = i * sizeof(uint32_t);
171 exec.flags = I915_EXEC_RENDER;
172 i915_execbuffer2_set_context_id(exec, ctx_id);
173
174 gem_execbuf(fd, &exec);
175
176 return handle;
177 }
178
179 /*
180 * A single bo is operated from batchbuffers submitted from two contexts and on
181 * different rings.
182 * One execbuf finishes way ahead of the other at which point the respective
183 * context is destroyed.
184 */
185 static void
test_retire_vma_not_inactive(int fd)186 test_retire_vma_not_inactive(int fd)
187 {
188 uint32_t ctx_id;
189 uint32_t src, dst;
190 uint32_t blit_bb, noop_bb;
191
192 igt_require(HAS_BLT_RING(intel_get_drm_devid(fd)));
193
194 ctx_id = gem_context_create(fd);
195
196 /* Create some bos batch buffers will operate on. */
197 src = gem_create(fd, BO_SIZE);
198 dst = gem_create(fd, BO_SIZE);
199
200 /* Submit a long running batch. */
201 blit_bb = blit(fd, dst, src, 0);
202
203 /* Submit a quick batch referencing the same object. */
204 noop_bb = noop(fd, src, ctx_id);
205
206 /* Wait for the quick batch to complete. */
207 gem_sync(fd, noop_bb);
208 gem_close(fd, noop_bb);
209
210 /* Now destroy the context in which the quick batch was submitted. */
211 gem_context_destroy(fd, ctx_id);
212
213 /* Wait for the slow batch to finish and clean up. */
214 gem_sync(fd, blit_bb);
215 gem_close(fd, blit_bb);
216
217 gem_close(fd, src);
218 gem_close(fd, dst);
219 }
220
221 int fd;
222
223 igt_main
224 {
225 igt_fixture {
226 fd = drm_open_driver(DRIVER_INTEL);
227 igt_require_gem(fd);
228
229 gem_require_contexts(fd);
230 }
231
232 igt_subtest("retire-vma-not-inactive")
233 test_retire_vma_not_inactive(fd);
234 }
235