1 /*
2 * Copyright © 2015 Intel Corporation
3 * Copyright © 2017 Keith Packard
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 /** @file kms_sequence.c
26 *
27 * This is a test of drmCrtcGetSequence and drmCrtcQueueSequence
28 */
29
30 #include "igt.h"
31 #include <stdlib.h>
32 #include <stdio.h>
33 #include <string.h>
34 #include <fcntl.h>
35 #include <inttypes.h>
36 #include <errno.h>
37 #include <time.h>
38 #include <sys/poll.h>
39 #include <sys/stat.h>
40 #include <sys/time.h>
41 #include <sys/wait.h>
42
43 #include <drm.h>
44
45 #include "intel_bufmgr.h"
46
47 IGT_TEST_DESCRIPTION("Test CrtcGetSequence and CrtcQueueSequence.");
48
49 typedef struct {
50 igt_display_t display;
51 struct igt_fb primary_fb;
52 igt_output_t *output;
53 uint32_t crtc_id;
54 enum pipe pipe;
55 unsigned int flags;
56 #define IDLE 1
57 #define BUSY 2
58 #define FORKED 4
59 } data_t;
60
61 struct local_drm_crtc_get_sequence {
62 __u32 crtc_id;
63 __u32 active;
64 __u64 sequence;
65 __u64 sequence_ns;
66 };
67
68 struct local_drm_crtc_queue_sequence {
69 __u32 crtc_id;
70 __u32 flags;
71 __u64 sequence;
72 __u64 user_data;
73 };
74
75 #define LOCAL_DRM_IOCTL_CRTC_GET_SEQUENCE DRM_IOWR(0x3b, struct local_drm_crtc_get_sequence)
76 #define LOCAL_DRM_IOCTL_CRTC_QUEUE_SEQUENCE DRM_IOWR(0x3c, struct local_drm_crtc_queue_sequence)
77
78 #define LOCAL_DRM_CRTC_SEQUENCE_RELATIVE 0x00000001 /* sequence is relative to current */
79 #define LOCAL_DRM_CRTC_SEQUENCE_NEXT_ON_MISS 0x00000002 /* Use next sequence if we've missed */
80
81 struct local_drm_event_crtc_sequence {
82 struct drm_event base;
83 __u64 user_data;
84 __s64 time_ns;
85 __u64 sequence;
86 };
87
88
elapsed(const struct timespec * start,const struct timespec * end,int loop)89 static double elapsed(const struct timespec *start,
90 const struct timespec *end,
91 int loop)
92 {
93 return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_nsec - start->tv_nsec)/1000)/loop;
94 }
95
prepare_crtc(data_t * data,int fd,igt_output_t * output)96 static void prepare_crtc(data_t *data, int fd, igt_output_t *output)
97 {
98 drmModeModeInfo *mode;
99 igt_display_t *display = &data->display;
100 igt_plane_t *primary;
101
102 /* select the pipe we want to use */
103 igt_output_set_pipe(output, data->pipe);
104
105 /* create and set the primary plane fb */
106 mode = igt_output_get_mode(output);
107 igt_create_color_fb(fd, mode->hdisplay, mode->vdisplay,
108 DRM_FORMAT_XRGB8888,
109 LOCAL_DRM_FORMAT_MOD_NONE,
110 0.0, 0.0, 0.0,
111 &data->primary_fb);
112
113 primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
114 igt_plane_set_fb(primary, &data->primary_fb);
115
116 data->crtc_id = primary->pipe->crtc_id;
117
118 igt_display_commit(display);
119
120 igt_wait_for_vblank(fd, data->pipe);
121 }
122
cleanup_crtc(data_t * data,int fd,igt_output_t * output)123 static void cleanup_crtc(data_t *data, int fd, igt_output_t *output)
124 {
125 igt_display_t *display = &data->display;
126 igt_plane_t *primary;
127
128 igt_remove_fb(fd, &data->primary_fb);
129
130 primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
131 igt_plane_set_fb(primary, NULL);
132
133 igt_output_set_pipe(output, PIPE_ANY);
134 igt_display_commit(display);
135 }
136
crtc_get_sequence(int fd,struct local_drm_crtc_get_sequence * cgs)137 static int crtc_get_sequence(int fd, struct local_drm_crtc_get_sequence *cgs)
138 {
139 int err;
140
141 err = 0;
142 if (igt_ioctl(fd, LOCAL_DRM_IOCTL_CRTC_GET_SEQUENCE, cgs))
143 err = -errno;
144
145 return err;
146 }
147
crtc_queue_sequence(int fd,struct local_drm_crtc_queue_sequence * cqs)148 static int crtc_queue_sequence(int fd, struct local_drm_crtc_queue_sequence *cqs)
149 {
150 int err;
151
152 err = 0;
153 if (igt_ioctl(fd, LOCAL_DRM_IOCTL_CRTC_QUEUE_SEQUENCE, cqs))
154 err = -errno;
155 return err;
156 }
157
run_test(data_t * data,int fd,void (* testfunc)(data_t *,int,int))158 static void run_test(data_t *data, int fd, void (*testfunc)(data_t *, int, int))
159 {
160 int nchildren =
161 data->flags & FORKED ? sysconf(_SC_NPROCESSORS_ONLN) : 1;
162 igt_display_t *display = &data->display;
163 igt_output_t *output;
164 enum pipe p;
165 unsigned int valid_tests = 0;
166
167 for_each_pipe_with_valid_output(display, p, output) {
168 data->pipe = p;
169 prepare_crtc(data, fd, output);
170
171 igt_info("Beginning %s on pipe %s, connector %s (%d threads)\n",
172 igt_subtest_name(),
173 kmstest_pipe_name(data->pipe),
174 igt_output_name(output),
175 nchildren);
176
177 if (data->flags & BUSY) {
178 struct local_drm_crtc_queue_sequence cqs;
179
180 memset(&cqs, 0, sizeof(cqs));
181 cqs.crtc_id = data->crtc_id;
182 cqs.flags = LOCAL_DRM_CRTC_SEQUENCE_RELATIVE;
183 cqs.sequence = 120 + 12;
184 igt_assert_eq(crtc_queue_sequence(fd, &cqs), 0);
185 }
186
187 igt_fork(child, nchildren)
188 testfunc(data, fd, nchildren);
189 igt_waitchildren();
190
191 if (data->flags & BUSY) {
192 struct drm_event_vblank buf;
193 igt_assert_eq(read(fd, &buf, sizeof(buf)), sizeof(buf));
194 }
195
196 igt_assert(poll(&(struct pollfd){fd, POLLIN}, 1, 0) == 0);
197
198 igt_info("\n%s on pipe %s, connector %s: PASSED\n\n",
199 igt_subtest_name(),
200 kmstest_pipe_name(data->pipe),
201 igt_output_name(output));
202
203 /* cleanup what prepare_crtc() has done */
204 cleanup_crtc(data, fd, output);
205 valid_tests++;
206 }
207
208 igt_require_f(valid_tests,
209 "no valid crtc/connector combinations found\n");
210 }
211
sequence_get(data_t * data,int fd,int nchildren)212 static void sequence_get(data_t *data, int fd, int nchildren)
213 {
214 struct local_drm_crtc_get_sequence cgs;
215 struct timespec start, end;
216 unsigned long sq, count = 0;
217
218 memset(&cgs, 0, sizeof(cgs));
219 cgs.crtc_id = data->crtc_id;
220 igt_assert_eq(crtc_get_sequence(fd, &cgs), 0);
221
222 sq = cgs.sequence;
223
224 clock_gettime(CLOCK_MONOTONIC, &start);
225 do {
226 igt_assert_eq(crtc_get_sequence(fd, &cgs), 0);
227 count++;
228 } while ((cgs.sequence - sq) <= 120);
229 clock_gettime(CLOCK_MONOTONIC, &end);
230
231 igt_info("Time to get current counter (%s): %7.3fµs\n",
232 data->flags & BUSY ? "busy" : "idle", elapsed(&start, &end, count));
233 }
234
sequence_queue(data_t * data,int fd,int nchildren)235 static void sequence_queue(data_t *data, int fd, int nchildren)
236 {
237 struct local_drm_crtc_get_sequence cgs_start, cgs_end;
238 struct local_drm_crtc_queue_sequence cqs;
239 unsigned long target;
240 int total = 120 / nchildren;
241 int n;
242 double frame_time;
243
244 memset(&cgs_start, 0, sizeof(cgs_start));
245 cgs_start.crtc_id = data->crtc_id;
246 igt_assert_eq(crtc_get_sequence(fd, &cgs_start), 0);
247
248 target = cgs_start.sequence + total;
249 for (n = 0; n < total; n++) {
250 memset(&cqs, 0, sizeof(cqs));
251 cqs.crtc_id = data->crtc_id;
252 cqs.flags = 0;
253 cqs.sequence = target;
254 igt_assert_eq(crtc_queue_sequence(fd, &cqs), 0);
255 igt_assert_eq(cqs.sequence, target);
256 }
257
258 for (n = 0; n < total; n++) {
259 struct local_drm_event_crtc_sequence ev;
260 igt_assert_eq(read(fd, &ev, sizeof(ev)), sizeof(ev));
261 igt_assert_eq(ev.sequence, target);
262 }
263 memset(&cgs_end, 0, sizeof(cgs_end));
264 cgs_end.crtc_id = data->crtc_id;
265 igt_assert_eq(crtc_get_sequence(fd, &cgs_end), 0);
266 igt_assert_eq(cgs_end.sequence, target);
267
268 frame_time = (double) (cgs_end.sequence_ns - cgs_start.sequence_ns) / (1e9 * total);
269 igt_info("Time per frame from queue to event (%s): %7.3fms(%7.3fHz)\n",
270 data->flags & BUSY ? "busy" : "idle",
271 frame_time * 1000.0, 1.0/frame_time);
272 }
273
274 igt_main
275 {
276 int fd;
277 data_t data;
278 const struct {
279 const char *name;
280 void (*func)(data_t *, int, int);
281 unsigned int valid;
282 } funcs[] = {
283 { "get", sequence_get, IDLE | FORKED | BUSY },
284 { "queue", sequence_queue, IDLE | BUSY },
285 { }
286 }, *f;
287 const struct {
288 const char *name;
289 unsigned int flags;
290 } modes[] = {
291 { "idle", IDLE },
292 { "forked", IDLE | FORKED },
293 { "busy", BUSY },
294 { "forked-busy", BUSY | FORKED },
295 { }
296 }, *m;
297
298 igt_skip_on_simulation();
299
300 igt_fixture {
301 fd = drm_open_driver_master(DRIVER_ANY);
302 kmstest_set_vt_graphics_mode();
303 igt_display_require(&data.display, fd);
304 }
305
306 for (f = funcs; f->name; f++) {
307 for (m = modes; m->name; m++) {
308 if (m->flags & ~f->valid)
309 continue;
310
311 igt_subtest_f("%s-%s", f->name, m->name) {
312 data.flags = m->flags;
313 run_test(&data, fd, f->func);
314 }
315 }
316 }
317 }
318