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4 modification, are permitted provided that the following conditions
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15 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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26 ***********************************************************************/
27
28 #ifndef SILK_MACROS_ARMv4_H
29 #define SILK_MACROS_ARMv4_H
30
31 /* This macro only avoids the undefined behaviour from a left shift of
32 a negative value. It should only be used in macros that can't include
33 SigProc_FIX.h. In other cases, use silk_LSHIFT32(). */
34 #define SAFE_SHL(a,b) ((opus_int32)((opus_uint32)(a) << (b)))
35
36 /* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */
37 #undef silk_SMULWB
silk_SMULWB_armv4(opus_int32 a,opus_int16 b)38 static OPUS_INLINE opus_int32 silk_SMULWB_armv4(opus_int32 a, opus_int16 b)
39 {
40 unsigned rd_lo;
41 int rd_hi;
42 __asm__(
43 "#silk_SMULWB\n\t"
44 "smull %0, %1, %2, %3\n\t"
45 : "=&r"(rd_lo), "=&r"(rd_hi)
46 : "%r"(a), "r"(SAFE_SHL(b,16))
47 );
48 return rd_hi;
49 }
50 #define silk_SMULWB(a, b) (silk_SMULWB_armv4(a, b))
51
52 /* a32 + (b32 * (opus_int32)((opus_int16)(c32))) >> 16 output have to be 32bit int */
53 #undef silk_SMLAWB
54 #define silk_SMLAWB(a, b, c) ((a) + silk_SMULWB(b, c))
55
56 /* (a32 * (b32 >> 16)) >> 16 */
57 #undef silk_SMULWT
silk_SMULWT_armv4(opus_int32 a,opus_int32 b)58 static OPUS_INLINE opus_int32 silk_SMULWT_armv4(opus_int32 a, opus_int32 b)
59 {
60 unsigned rd_lo;
61 int rd_hi;
62 __asm__(
63 "#silk_SMULWT\n\t"
64 "smull %0, %1, %2, %3\n\t"
65 : "=&r"(rd_lo), "=&r"(rd_hi)
66 : "%r"(a), "r"(b&~0xFFFF)
67 );
68 return rd_hi;
69 }
70 #define silk_SMULWT(a, b) (silk_SMULWT_armv4(a, b))
71
72 /* a32 + (b32 * (c32 >> 16)) >> 16 */
73 #undef silk_SMLAWT
74 #define silk_SMLAWT(a, b, c) ((a) + silk_SMULWT(b, c))
75
76 /* (a32 * b32) >> 16 */
77 #undef silk_SMULWW
silk_SMULWW_armv4(opus_int32 a,opus_int32 b)78 static OPUS_INLINE opus_int32 silk_SMULWW_armv4(opus_int32 a, opus_int32 b)
79 {
80 unsigned rd_lo;
81 int rd_hi;
82 __asm__(
83 "#silk_SMULWW\n\t"
84 "smull %0, %1, %2, %3\n\t"
85 : "=&r"(rd_lo), "=&r"(rd_hi)
86 : "%r"(a), "r"(b)
87 );
88 return SAFE_SHL(rd_hi,16)+(rd_lo>>16);
89 }
90 #define silk_SMULWW(a, b) (silk_SMULWW_armv4(a, b))
91
92 #undef silk_SMLAWW
silk_SMLAWW_armv4(opus_int32 a,opus_int32 b,opus_int32 c)93 static OPUS_INLINE opus_int32 silk_SMLAWW_armv4(opus_int32 a, opus_int32 b,
94 opus_int32 c)
95 {
96 unsigned rd_lo;
97 int rd_hi;
98 __asm__(
99 "#silk_SMLAWW\n\t"
100 "smull %0, %1, %2, %3\n\t"
101 : "=&r"(rd_lo), "=&r"(rd_hi)
102 : "%r"(b), "r"(c)
103 );
104 return a+SAFE_SHL(rd_hi,16)+(rd_lo>>16);
105 }
106 #define silk_SMLAWW(a, b, c) (silk_SMLAWW_armv4(a, b, c))
107
108 #undef SAFE_SHL
109
110 #endif /* SILK_MACROS_ARMv4_H */
111