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1// REQUIRES: amdgpu-registered-target
2// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx900 -S -emit-llvm -o - %s | FileCheck %s
3
4#pragma OPENCL EXTENSION cl_khr_fp16 : enable
5
6// CHECK-LABEL: test_interp_f16
7// CHECK: call float @llvm.amdgcn.interp.p1.f16
8// CHECK: call half @llvm.amdgcn.interp.p2.f16
9// CHECK: call float @llvm.amdgcn.interp.p1.f16
10// CHECK: call half @llvm.amdgcn.interp.p2.f16
11void test_interp_f16(global half* out, float i, float j, int m0)
12{
13  float p1_0 = __builtin_amdgcn_interp_p1_f16(i, 2, 3, false, m0);
14  half p2_0 = __builtin_amdgcn_interp_p2_f16(p1_0, j, 2, 3, false, m0);
15  float p1_1 = __builtin_amdgcn_interp_p1_f16(i, 2, 3, true, m0);
16  half p2_1 = __builtin_amdgcn_interp_p2_f16(p1_1, j, 2, 3, true, m0);
17  *out = p2_0 + p2_1;
18}
19
20// CHECK-LABEL: test_interp_f32
21// CHECK: call float @llvm.amdgcn.interp.p1
22// CHECK: call float @llvm.amdgcn.interp.p2
23void test_interp_f32(global float* out, float i, float j, int m0)
24{
25  float p1 = __builtin_amdgcn_interp_p1(i, 1, 4, m0);
26  *out = __builtin_amdgcn_interp_p2(p1, j, 1, 4, m0);
27}
28
29// CHECK-LABEL: test_interp_mov
30// CHECK: call float @llvm.amdgcn.interp.mov
31void test_interp_mov(global float* out, float i, float j, int m0)
32{
33  *out = __builtin_amdgcn_interp_mov(2, 3, 4, m0);
34}
35