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1add_llvm_component_group(AMDGPU)
2
3set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
4
5tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
6tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
7tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
8tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
9tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
10tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
11tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
12tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
13tablegen(LLVM AMDGPUGenRegisterBank.inc -gen-register-bank)
14tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
15tablegen(LLVM AMDGPUGenSearchableTables.inc -gen-searchable-tables)
16tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
17
18set(LLVM_TARGET_DEFINITIONS AMDGPUGISel.td)
19tablegen(LLVM AMDGPUGenGlobalISel.inc -gen-global-isel)
20tablegen(LLVM AMDGPUGenPreLegalizeGICombiner.inc -gen-global-isel-combiner
21              -combiners="AMDGPUPreLegalizerCombinerHelper")
22tablegen(LLVM AMDGPUGenPostLegalizeGICombiner.inc -gen-global-isel-combiner
23              -combiners="AMDGPUPostLegalizerCombinerHelper")
24tablegen(LLVM AMDGPUGenRegBankGICombiner.inc -gen-global-isel-combiner
25              -combiners="AMDGPURegBankCombinerHelper")
26
27set(LLVM_TARGET_DEFINITIONS R600.td)
28tablegen(LLVM R600GenAsmWriter.inc -gen-asm-writer)
29tablegen(LLVM R600GenCallingConv.inc -gen-callingconv)
30tablegen(LLVM R600GenDAGISel.inc -gen-dag-isel)
31tablegen(LLVM R600GenDFAPacketizer.inc -gen-dfa-packetizer)
32tablegen(LLVM R600GenInstrInfo.inc -gen-instr-info)
33tablegen(LLVM R600GenMCCodeEmitter.inc -gen-emitter)
34tablegen(LLVM R600GenRegisterInfo.inc -gen-register-info)
35tablegen(LLVM R600GenSubtargetInfo.inc -gen-subtarget)
36
37add_public_tablegen_target(AMDGPUCommonTableGen)
38
39set(LLVM_TARGET_DEFINITIONS InstCombineTables.td)
40tablegen(LLVM InstCombineTables.inc -gen-searchable-tables)
41add_public_tablegen_target(InstCombineTableGen)
42
43add_llvm_target(AMDGPUCodeGen
44  AMDGPUAliasAnalysis.cpp
45  AMDGPUAlwaysInlinePass.cpp
46  AMDGPUAnnotateKernelFeatures.cpp
47  AMDGPUAnnotateUniformValues.cpp
48  AMDGPUArgumentUsageInfo.cpp
49  AMDGPUAsmPrinter.cpp
50  AMDGPUAtomicOptimizer.cpp
51  AMDGPUCallLowering.cpp
52  AMDGPUCodeGenPrepare.cpp
53  AMDGPUExportClustering.cpp
54  AMDGPUFixFunctionBitcasts.cpp
55  AMDGPUFrameLowering.cpp
56  AMDGPUHSAMetadataStreamer.cpp
57  AMDGPUInstCombineIntrinsic.cpp
58  AMDGPUInstrInfo.cpp
59  AMDGPUInstructionSelector.cpp
60  AMDGPUISelDAGToDAG.cpp
61  AMDGPUISelLowering.cpp
62  AMDGPUGlobalISelUtils.cpp
63  AMDGPULateCodeGenPrepare.cpp
64  AMDGPULegalizerInfo.cpp
65  AMDGPULibCalls.cpp
66  AMDGPULibFunc.cpp
67  AMDGPULowerIntrinsics.cpp
68  AMDGPULowerKernelArguments.cpp
69  AMDGPULowerKernelAttributes.cpp
70  AMDGPUMachineCFGStructurizer.cpp
71  AMDGPUMachineFunction.cpp
72  AMDGPUMachineModuleInfo.cpp
73  AMDGPUMacroFusion.cpp
74  AMDGPUMCInstLower.cpp
75  AMDGPUOpenCLEnqueuedBlockLowering.cpp
76  AMDGPUPostLegalizerCombiner.cpp
77  AMDGPUPreLegalizerCombiner.cpp
78  AMDGPUPromoteAlloca.cpp
79  AMDGPUPropagateAttributes.cpp
80  AMDGPURegBankCombiner.cpp
81  AMDGPURegisterBankInfo.cpp
82  AMDGPURewriteOutArguments.cpp
83  AMDGPUSubtarget.cpp
84  AMDGPUTargetMachine.cpp
85  AMDGPUTargetObjectFile.cpp
86  AMDGPUTargetTransformInfo.cpp
87  AMDGPUUnifyDivergentExitNodes.cpp
88  AMDGPUUnifyMetadata.cpp
89  AMDGPUInline.cpp
90  AMDGPUPerfHintAnalysis.cpp
91  AMDILCFGStructurizer.cpp
92  AMDGPUPrintfRuntimeBinding.cpp
93  GCNHazardRecognizer.cpp
94  GCNIterativeScheduler.cpp
95  GCNMinRegStrategy.cpp
96  GCNRegPressure.cpp
97  GCNSchedStrategy.cpp
98  R600AsmPrinter.cpp
99  R600ClauseMergePass.cpp
100  R600ControlFlowFinalizer.cpp
101  R600EmitClauseMarkers.cpp
102  R600ExpandSpecialInstrs.cpp
103  R600FrameLowering.cpp
104  R600InstrInfo.cpp
105  R600ISelLowering.cpp
106  R600MachineFunctionInfo.cpp
107  R600MachineScheduler.cpp
108  R600OpenCLImageTypeLoweringPass.cpp
109  R600OptimizeVectorRegisters.cpp
110  R600Packetizer.cpp
111  R600RegisterInfo.cpp
112  SIAddIMGInit.cpp
113  SIAnnotateControlFlow.cpp
114  SIFixSGPRCopies.cpp
115  SIFixVGPRCopies.cpp
116  SIPreAllocateWWMRegs.cpp
117  SIFoldOperands.cpp
118  SIFormMemoryClauses.cpp
119  SIFrameLowering.cpp
120  SIInsertHardClauses.cpp
121  SIInsertSkips.cpp
122  SIInsertWaitcnts.cpp
123  SIInstrInfo.cpp
124  SIISelLowering.cpp
125  SILoadStoreOptimizer.cpp
126  SILowerControlFlow.cpp
127  SILowerI1Copies.cpp
128  SILowerSGPRSpills.cpp
129  SIMachineFunctionInfo.cpp
130  SIMachineScheduler.cpp
131  SIMemoryLegalizer.cpp
132  SIOptimizeExecMasking.cpp
133  SIOptimizeExecMaskingPreRA.cpp
134  SIPeepholeSDWA.cpp
135  SIPostRABundler.cpp
136  SIPreEmitPeephole.cpp
137  SIProgramInfo.cpp
138  SIRegisterInfo.cpp
139  SIRemoveShortExecBranches.cpp
140  SIShrinkInstructions.cpp
141  SIWholeQuadMode.cpp
142  GCNILPSched.cpp
143  GCNRegBankReassign.cpp
144  GCNNSAReassign.cpp
145  GCNDPPCombine.cpp
146  SIModeRegister.cpp
147
148  LINK_COMPONENTS
149  Analysis
150  AsmPrinter
151  CodeGen
152  Core
153  IPO
154  MC
155  AMDGPUDesc
156  AMDGPUInfo
157  AMDGPUUtils
158  Scalar
159  SelectionDAG
160  Support
161  Target
162  TransformUtils
163  Vectorize
164  GlobalISel
165  BinaryFormat
166  MIRParser
167
168  ADD_TO_COMPONENT
169  AMDGPU
170  )
171
172add_subdirectory(AsmParser)
173add_subdirectory(Disassembler)
174add_subdirectory(MCTargetDesc)
175add_subdirectory(TargetInfo)
176add_subdirectory(Utils)
177