1//===-- NVPTXRegisterInfo.td - NVPTX Register defs ---------*- tablegen -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Declarations that describe the PTX register file 11//===----------------------------------------------------------------------===// 12 13class NVPTXReg<string n> : Register<n> { 14 let Namespace = "NVPTX"; 15} 16 17class NVPTXRegClass<list<ValueType> regTypes, int alignment, dag regList> 18 : RegisterClass <"NVPTX", regTypes, alignment, regList>; 19 20//===----------------------------------------------------------------------===// 21// Registers 22//===----------------------------------------------------------------------===// 23 24// Special Registers used as stack pointer 25def VRFrame : NVPTXReg<"%SP">; 26def VRFrameLocal : NVPTXReg<"%SPL">; 27 28// Special Registers used as the stack 29def VRDepot : NVPTXReg<"%Depot">; 30 31// We use virtual registers, but define a few physical registers here to keep 32// SDAG and the MachineInstr layers happy. 33foreach i = 0...4 in { 34 def P#i : NVPTXReg<"%p"#i>; // Predicate 35 def RS#i : NVPTXReg<"%rs"#i>; // 16-bit 36 def R#i : NVPTXReg<"%r"#i>; // 32-bit 37 def RL#i : NVPTXReg<"%rd"#i>; // 64-bit 38 def H#i : NVPTXReg<"%h"#i>; // 16-bit float 39 def HH#i : NVPTXReg<"%hh"#i>; // 2x16-bit float 40 def F#i : NVPTXReg<"%f"#i>; // 32-bit float 41 def FL#i : NVPTXReg<"%fd"#i>; // 64-bit float 42 43 // Arguments 44 def ia#i : NVPTXReg<"%ia"#i>; 45 def la#i : NVPTXReg<"%la"#i>; 46 def fa#i : NVPTXReg<"%fa"#i>; 47 def da#i : NVPTXReg<"%da"#i>; 48} 49 50foreach i = 0...31 in { 51 def ENVREG#i : NVPTXReg<"%envreg"#i>; 52} 53 54//===----------------------------------------------------------------------===// 55// Register classes 56//===----------------------------------------------------------------------===// 57def Int1Regs : NVPTXRegClass<[i1], 8, (add (sequence "P%u", 0, 4))>; 58def Int16Regs : NVPTXRegClass<[i16], 16, (add (sequence "RS%u", 0, 4))>; 59def Int32Regs : NVPTXRegClass<[i32], 32, (add (sequence "R%u", 0, 4))>; 60def Int64Regs : NVPTXRegClass<[i64], 64, (add (sequence "RL%u", 0, 4))>; 61def Float16Regs : NVPTXRegClass<[f16], 16, (add (sequence "H%u", 0, 4))>; 62def Float16x2Regs : NVPTXRegClass<[v2f16], 32, (add (sequence "HH%u", 0, 4))>; 63def Float32Regs : NVPTXRegClass<[f32], 32, (add (sequence "F%u", 0, 4))>; 64def Float64Regs : NVPTXRegClass<[f64], 64, (add (sequence "FL%u", 0, 4))>; 65def Int32ArgRegs : NVPTXRegClass<[i32], 32, (add (sequence "ia%u", 0, 4))>; 66def Int64ArgRegs : NVPTXRegClass<[i64], 64, (add (sequence "la%u", 0, 4))>; 67def Float32ArgRegs : NVPTXRegClass<[f32], 32, (add (sequence "fa%u", 0, 4))>; 68def Float64ArgRegs : NVPTXRegClass<[f64], 64, (add (sequence "da%u", 0, 4))>; 69 70// Read NVPTXRegisterInfo.cpp to see how VRFrame and VRDepot are used. 71def SpecialRegs : NVPTXRegClass<[i32], 32, (add VRFrame, VRFrameLocal, VRDepot, 72 (sequence "ENVREG%u", 0, 31))>; 73