1; RUN: opt -S < %s | FileCheck %s 2; RUN: llvm-dis < %s.bc | FileCheck %s 3 4 5define float @fadd_v2(<4 x float> %in, float %acc) { 6; CHECK-LABEL: @fadd_v2 7; CHECK: %res = call float @llvm.vector.reduce.fadd.v4f32(float %acc, <4 x float> %in) 8 %res = call float @llvm.experimental.vector.reduce.v2.fadd.f32.v4f32(float %acc, <4 x float> %in) 9 ret float %res 10} 11 12define float @fadd_v2_fast(<4 x float> %in, float %acc) { 13; CHECK-LABEL: @fadd_v2_fast 14; CHECK: %res = call fast float @llvm.vector.reduce.fadd.v4f32(float %acc, <4 x float> %in) 15 %res = call fast float @llvm.experimental.vector.reduce.v2.fadd.f32.v4f32(float %acc, <4 x float> %in) 16 ret float %res 17} 18 19define float @fmul_v2(<4 x float> %in, float %acc) { 20; CHECK-LABEL: @fmul_v2 21; CHECK: %res = call float @llvm.vector.reduce.fmul.v4f32(float %acc, <4 x float> %in) 22 %res = call float @llvm.experimental.vector.reduce.v2.fmul.f32.v4f32(float %acc, <4 x float> %in) 23 ret float %res 24} 25 26define float @fmul_v2_fast(<4 x float> %in, float %acc) { 27; CHECK-LABEL: @fmul_v2_fast 28; CHECK: %res = call fast float @llvm.vector.reduce.fmul.v4f32(float %acc, <4 x float> %in) 29 %res = call fast float @llvm.experimental.vector.reduce.v2.fmul.f32.v4f32(float %acc, <4 x float> %in) 30 ret float %res 31} 32 33define float @fmin(<4 x float> %in) { 34; CHECK-LABEL: @fmin 35; CHECK: %res = call float @llvm.vector.reduce.fmin.v4f32(<4 x float> %in) 36 %res = call float @llvm.experimental.vector.reduce.fmin.v4f32(<4 x float> %in) 37 ret float %res 38} 39 40define float @fmax(<4 x float> %in) { 41; CHECK-LABEL: @fmax 42; CHECK: %res = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> %in) 43 %res = call float @llvm.experimental.vector.reduce.fmax.v4f32(<4 x float> %in) 44 ret float %res 45} 46 47define i32 @and(<4 x i32> %in) { 48; CHECK-LABEL: @and 49; CHECK: %res = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %in) 50 %res = call i32 @llvm.experimental.vector.reduce.and.v4i32(<4 x i32> %in) 51 ret i32 %res 52} 53 54define i32 @or(<4 x i32> %in) { 55; CHECK-LABEL: @or 56; CHECK: %res = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %in) 57 %res = call i32 @llvm.experimental.vector.reduce.or.v4i32(<4 x i32> %in) 58 ret i32 %res 59} 60 61define i32 @xor(<4 x i32> %in) { 62; CHECK-LABEL: @xor 63; CHECK: %res = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> %in) 64 %res = call i32 @llvm.experimental.vector.reduce.xor.v4i32(<4 x i32> %in) 65 ret i32 %res 66} 67 68define i32 @smin(<4 x i32> %in) { 69; CHECK-LABEL: @smin 70; CHECK: %res = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> %in) 71 %res = call i32 @llvm.experimental.vector.reduce.smin.v4i32(<4 x i32> %in) 72 ret i32 %res 73} 74 75define i32 @smax(<4 x i32> %in) { 76; CHECK-LABEL: @smax 77; CHECK: %res = call i32 @llvm.vector.reduce.smax.v4i32(<4 x i32> %in) 78 %res = call i32 @llvm.experimental.vector.reduce.smax.v4i32(<4 x i32> %in) 79 ret i32 %res 80} 81 82define i32 @umin(<4 x i32> %in) { 83; CHECK-LABEL: @umin 84; CHECK: %res = call i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> %in) 85 %res = call i32 @llvm.experimental.vector.reduce.umin.v4i32(<4 x i32> %in) 86 ret i32 %res 87} 88 89define i32 @umax(<4 x i32> %in) { 90; CHECK-LABEL: @umax 91; CHECK: %res = call i32 @llvm.vector.reduce.umax.v4i32(<4 x i32> %in) 92 %res = call i32 @llvm.experimental.vector.reduce.umax.v4i32(<4 x i32> %in) 93 ret i32 %res 94} 95 96 97declare float @llvm.experimental.vector.reduce.v2.fadd.f32.v4f32(float, <4 x float>) 98declare float @llvm.experimental.vector.reduce.v2.fmul.f32.v4f32(float, <4 x float>) 99 100declare float @llvm.experimental.vector.reduce.fmin.v4f32(<4 x float>) 101; CHECK: declare float @llvm.vector.reduce.fmin.v4f32(<4 x float>) 102 103declare float @llvm.experimental.vector.reduce.fmax.v4f32(<4 x float>) 104; CHECK: declare float @llvm.vector.reduce.fmax.v4f32(<4 x float>) 105 106declare i32 @llvm.experimental.vector.reduce.and.v4i32(<4 x i32>) 107; CHECK: declare i32 @llvm.vector.reduce.and.v4i32(<4 x i32>) 108 109declare i32 @llvm.experimental.vector.reduce.or.v4i32(<4 x i32>) 110; CHECK: declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32>) 111 112declare i32 @llvm.experimental.vector.reduce.xor.v4i32(<4 x i32>) 113; CHECK: declare i32 @llvm.vector.reduce.xor.v4i32(<4 x i32>) 114 115declare i32 @llvm.experimental.vector.reduce.smin.v4i32(<4 x i32>) 116; CHECK: declare i32 @llvm.vector.reduce.smin.v4i32(<4 x i32>) 117 118declare i32 @llvm.experimental.vector.reduce.smax.v4i32(<4 x i32>) 119; CHECK: declare i32 @llvm.vector.reduce.smax.v4i32(<4 x i32>) 120 121declare i32 @llvm.experimental.vector.reduce.umin.v4i32(<4 x i32>) 122; CHECK: declare i32 @llvm.vector.reduce.umin.v4i32(<4 x i32>) 123 124declare i32 @llvm.experimental.vector.reduce.umax.v4i32(<4 x i32>) 125; CHECK: declare i32 @llvm.vector.reduce.umax.v4i32(<4 x i32>) 126 127 128 129 130 131