1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc -global-isel -stop-after=irtranslator -mtriple=aarch64-- -verify-machineinstrs -o - %s | FileCheck %s 3 4define i16 @smul_fix(i16 %arg0, i16 %arg1) { 5 ; CHECK-LABEL: name: smul_fix 6 ; CHECK: bb.1 (%ir-block.0): 7 ; CHECK: liveins: $w0, $w1 8 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0 9 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 10 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1 11 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 12 ; CHECK: [[SMULFIX:%[0-9]+]]:_(s16) = G_SMULFIX [[TRUNC]], [[TRUNC1]], 7 13 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SMULFIX]](s16) 14 ; CHECK: $w0 = COPY [[ANYEXT]](s32) 15 ; CHECK: RET_ReallyLR implicit $w0 16 %res = call i16 @llvm.smul.fix.i16(i16 %arg0, i16 %arg1, i32 7) 17 ret i16 %res 18} 19 20define i16 @umul_fix(i16 %arg0, i16 %arg1) { 21 ; CHECK-LABEL: name: umul_fix 22 ; CHECK: bb.1 (%ir-block.0): 23 ; CHECK: liveins: $w0, $w1 24 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0 25 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 26 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1 27 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 28 ; CHECK: [[UMULFIX:%[0-9]+]]:_(s16) = G_UMULFIX [[TRUNC]], [[TRUNC1]], 7 29 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UMULFIX]](s16) 30 ; CHECK: $w0 = COPY [[ANYEXT]](s32) 31 ; CHECK: RET_ReallyLR implicit $w0 32 %res = call i16 @llvm.umul.fix.i16(i16 %arg0, i16 %arg1, i32 7) 33 ret i16 %res 34} 35 36define i16 @smul_fix_sat(i16 %arg0, i16 %arg1) { 37 ; CHECK-LABEL: name: smul_fix_sat 38 ; CHECK: bb.1 (%ir-block.0): 39 ; CHECK: liveins: $w0, $w1 40 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0 41 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 42 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1 43 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 44 ; CHECK: [[SMULFIXSAT:%[0-9]+]]:_(s16) = G_SMULFIXSAT [[TRUNC]], [[TRUNC1]], 7 45 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SMULFIXSAT]](s16) 46 ; CHECK: $w0 = COPY [[ANYEXT]](s32) 47 ; CHECK: RET_ReallyLR implicit $w0 48 %res = call i16 @llvm.smul.fix.sat.i16(i16 %arg0, i16 %arg1, i32 7) 49 ret i16 %res 50} 51 52define i16 @umul_fix_sat(i16 %arg0, i16 %arg1) { 53 ; CHECK-LABEL: name: umul_fix_sat 54 ; CHECK: bb.1 (%ir-block.0): 55 ; CHECK: liveins: $w0, $w1 56 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0 57 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 58 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1 59 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 60 ; CHECK: [[UMULFIXSAT:%[0-9]+]]:_(s16) = G_UMULFIXSAT [[TRUNC]], [[TRUNC1]], 7 61 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UMULFIXSAT]](s16) 62 ; CHECK: $w0 = COPY [[ANYEXT]](s32) 63 ; CHECK: RET_ReallyLR implicit $w0 64 %res = call i16 @llvm.umul.fix.sat.i16(i16 %arg0, i16 %arg1, i32 7) 65 ret i16 %res 66} 67 68define i16 @sdiv_fix(i16 %arg0, i16 %arg1) { 69 ; CHECK-LABEL: name: sdiv_fix 70 ; CHECK: bb.1 (%ir-block.0): 71 ; CHECK: liveins: $w0, $w1 72 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0 73 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 74 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1 75 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 76 ; CHECK: [[SDIVFIX:%[0-9]+]]:_(s16) = G_SDIVFIX [[TRUNC]], [[TRUNC1]], 7 77 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SDIVFIX]](s16) 78 ; CHECK: $w0 = COPY [[ANYEXT]](s32) 79 ; CHECK: RET_ReallyLR implicit $w0 80 %res = call i16 @llvm.sdiv.fix.i16(i16 %arg0, i16 %arg1, i32 7) 81 ret i16 %res 82} 83 84define i16 @udiv_fix(i16 %arg0, i16 %arg1) { 85 ; CHECK-LABEL: name: udiv_fix 86 ; CHECK: bb.1 (%ir-block.0): 87 ; CHECK: liveins: $w0, $w1 88 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0 89 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 90 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1 91 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 92 ; CHECK: [[UDIVFIX:%[0-9]+]]:_(s16) = G_UDIVFIX [[TRUNC]], [[TRUNC1]], 7 93 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UDIVFIX]](s16) 94 ; CHECK: $w0 = COPY [[ANYEXT]](s32) 95 ; CHECK: RET_ReallyLR implicit $w0 96 %res = call i16 @llvm.udiv.fix.i16(i16 %arg0, i16 %arg1, i32 7) 97 ret i16 %res 98} 99 100define i16 @sdiv_fix_sat(i16 %arg0, i16 %arg1) { 101 ; CHECK-LABEL: name: sdiv_fix_sat 102 ; CHECK: bb.1 (%ir-block.0): 103 ; CHECK: liveins: $w0, $w1 104 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0 105 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 106 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1 107 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 108 ; CHECK: [[SDIVFIXSAT:%[0-9]+]]:_(s16) = G_SDIVFIXSAT [[TRUNC]], [[TRUNC1]], 7 109 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SDIVFIXSAT]](s16) 110 ; CHECK: $w0 = COPY [[ANYEXT]](s32) 111 ; CHECK: RET_ReallyLR implicit $w0 112 %res = call i16 @llvm.sdiv.fix.sat.i16(i16 %arg0, i16 %arg1, i32 7) 113 ret i16 %res 114} 115 116define i16 @udiv_fix_sat(i16 %arg0, i16 %arg1) { 117 ; CHECK-LABEL: name: udiv_fix_sat 118 ; CHECK: bb.1 (%ir-block.0): 119 ; CHECK: liveins: $w0, $w1 120 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0 121 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 122 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1 123 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 124 ; CHECK: [[UDIVFIXSAT:%[0-9]+]]:_(s16) = G_UDIVFIXSAT [[TRUNC]], [[TRUNC1]], 7 125 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UDIVFIXSAT]](s16) 126 ; CHECK: $w0 = COPY [[ANYEXT]](s32) 127 ; CHECK: RET_ReallyLR implicit $w0 128 %res = call i16 @llvm.udiv.fix.sat.i16(i16 %arg0, i16 %arg1, i32 7) 129 ret i16 %res 130} 131 132declare i16 @llvm.smul.fix.i16(i16, i16, i32 immarg) #0 133declare i16 @llvm.umul.fix.i16(i16, i16, i32 immarg) #0 134declare i16 @llvm.smul.fix.sat.i16(i16, i16, i32 immarg) #0 135declare i16 @llvm.umul.fix.sat.i16(i16, i16, i32 immarg) #0 136declare i16 @llvm.sdiv.fix.i16(i16, i16, i32 immarg) #1 137declare i16 @llvm.udiv.fix.i16(i16, i16, i32 immarg) #1 138declare i16 @llvm.sdiv.fix.sat.i16(i16, i16, i32 immarg) #1 139declare i16 @llvm.udiv.fix.sat.i16(i16, i16, i32 immarg) #1 140 141attributes #0 = { nounwind readnone speculatable willreturn } 142attributes #1 = { nounwind readnone } 143