1# RUN: llc -mtriple=arm64-unknown-unknown -global-isel -O0 -mattr=-fullfp16 -run-pass=legalizer %s -o - | FileCheck %s 2 3--- | 4 define <8 x half> @test_v8f16.ceil(<8 x half> %a) { 5 ret <8 x half> %a 6 } 7 8 define <4 x half> @test_v4f16.ceil(<4 x half> %a) { 9 ret <4 x half> %a 10 } 11 12... 13--- 14name: test_v8f16.ceil 15alignment: 4 16tracksRegLiveness: true 17registers: 18 - { id: 0, class: _ } 19 - { id: 1, class: _ } 20body: | 21 bb.1 (%ir-block.0): 22 liveins: $q0 23 ; CHECK-LABEL: name: test_v8f16.ceil 24 %0:_(<8 x s16>) = COPY $q0 25 ; CHECK: %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16) = G_UNMERGE_VALUES %{{[0-9]+}}(<8 x s16>) 26 ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16) 27 ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}} 28 ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32) 29 ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16) 30 ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}} 31 ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32) 32 ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16) 33 ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}} 34 ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32) 35 ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16) 36 ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}} 37 ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32) 38 ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16) 39 ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}} 40 ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32) 41 ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16) 42 ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}} 43 ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32) 44 ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16) 45 ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}} 46 ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32) 47 ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16) 48 ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}} 49 ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32) 50 ; CHECK: %{{[0-9]+}}:_(<8 x s16>) = G_BUILD_VECTOR %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16) 51 %1:_(<8 x s16>) = G_FCEIL %0 52 $q0 = COPY %1(<8 x s16>) 53 RET_ReallyLR implicit $q0 54 55... 56--- 57name: test_v4f16.ceil 58alignment: 4 59tracksRegLiveness: true 60registers: 61 - { id: 0, class: _ } 62 - { id: 1, class: _ } 63body: | 64 bb.1 (%ir-block.0): 65 liveins: $d0 66 ; CHECK-LABEL: name: test_v4f16.ceil 67 %0:_(<4 x s16>) = COPY $d0 68 ; CHECK: %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16) = G_UNMERGE_VALUES %{{[0-9]+}}(<4 x s16>) 69 ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16) 70 ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}} 71 ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32) 72 ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16) 73 ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}} 74 ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32) 75 ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16) 76 ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}} 77 ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32) 78 ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16) 79 ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}} 80 ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32) 81 ; CHECK: %{{[0-9]+}}:_(<4 x s16>) = G_BUILD_VECTOR %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16) 82 %1:_(<4 x s16>) = G_FCEIL %0 83 $d0 = COPY %1(<4 x s16>) 84 RET_ReallyLR implicit $d0 85 86... 87