1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc %s -verify-machineinstrs -mtriple=aarch64-unknown-unknown -run-pass=legalizer -simplify-mir -aarch64-neon-syntax=apple -mattr=-fullfp16 -o - | FileCheck %s --check-prefix=NO-FP16 3# RUN: llc %s -verify-machineinstrs -mtriple=aarch64-unknown-unknown -run-pass=legalizer -simplify-mir -aarch64-neon-syntax=apple -mattr=+fullfp16 -o - | FileCheck %s --check-prefix=FP16 4 5... 6--- 7name: test_f16.intrinsic_trunc 8alignment: 4 9tracksRegLiveness: true 10body: | 11 bb.0: 12 liveins: $h0 13 ; NO-FP16-LABEL: name: test_f16.intrinsic_trunc 14 ; NO-FP16: liveins: $h0 15 ; NO-FP16: [[COPY:%[0-9]+]]:_(s16) = COPY $h0 16 ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[COPY]](s16) 17 ; NO-FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT]] 18 ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC]](s32) 19 ; NO-FP16: $h0 = COPY [[FPTRUNC]](s16) 20 ; NO-FP16: RET_ReallyLR implicit $h0 21 ; FP16-LABEL: name: test_f16.intrinsic_trunc 22 ; FP16: liveins: $h0 23 ; FP16: [[COPY:%[0-9]+]]:_(s16) = COPY $h0 24 ; FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s16) = G_INTRINSIC_TRUNC [[COPY]] 25 ; FP16: $h0 = COPY [[INTRINSIC_TRUNC]](s16) 26 ; FP16: RET_ReallyLR implicit $h0 27 %0:_(s16) = COPY $h0 28 %1:_(s16) = G_INTRINSIC_TRUNC %0 29 $h0 = COPY %1(s16) 30 RET_ReallyLR implicit $h0 31 32... 33--- 34name: test_v4f16.intrinsic_trunc 35alignment: 4 36tracksRegLiveness: true 37machineFunctionInfo: {} 38body: | 39 bb.0: 40 liveins: $d0 41 42 ; NO-FP16-LABEL: name: test_v4f16.intrinsic_trunc 43 ; NO-FP16: liveins: $d0 44 ; NO-FP16: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0 45 ; NO-FP16: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 46 ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16) 47 ; NO-FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT]] 48 ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC]](s32) 49 ; NO-FP16: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16) 50 ; NO-FP16: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT1]] 51 ; NO-FP16: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC1]](s32) 52 ; NO-FP16: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16) 53 ; NO-FP16: [[INTRINSIC_TRUNC2:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT2]] 54 ; NO-FP16: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC2]](s32) 55 ; NO-FP16: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16) 56 ; NO-FP16: [[INTRINSIC_TRUNC3:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT3]] 57 ; NO-FP16: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC3]](s32) 58 ; NO-FP16: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16) 59 ; NO-FP16: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>) 60 ; NO-FP16: RET_ReallyLR implicit $d0 61 ; FP16-LABEL: name: test_v4f16.intrinsic_trunc 62 ; FP16: liveins: $d0 63 ; FP16: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0 64 ; FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<4 x s16>) = G_INTRINSIC_TRUNC [[COPY]] 65 ; FP16: $d0 = COPY [[INTRINSIC_TRUNC]](<4 x s16>) 66 ; FP16: RET_ReallyLR implicit $d0 67 %0:_(<4 x s16>) = COPY $d0 68 %1:_(<4 x s16>) = G_INTRINSIC_TRUNC %0 69 $d0 = COPY %1(<4 x s16>) 70 RET_ReallyLR implicit $d0 71 72... 73--- 74name: test_v8f16.intrinsic_trunc 75alignment: 4 76tracksRegLiveness: true 77machineFunctionInfo: {} 78body: | 79 bb.0: 80 liveins: $q0 81 82 ; NO-FP16-LABEL: name: test_v8f16.intrinsic_trunc 83 ; NO-FP16: liveins: $q0 84 ; NO-FP16: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0 85 ; NO-FP16: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<8 x s16>) 86 ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16) 87 ; NO-FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT]] 88 ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC]](s32) 89 ; NO-FP16: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16) 90 ; NO-FP16: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT1]] 91 ; NO-FP16: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC1]](s32) 92 ; NO-FP16: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16) 93 ; NO-FP16: [[INTRINSIC_TRUNC2:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT2]] 94 ; NO-FP16: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC2]](s32) 95 ; NO-FP16: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16) 96 ; NO-FP16: [[INTRINSIC_TRUNC3:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT3]] 97 ; NO-FP16: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC3]](s32) 98 ; NO-FP16: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[UV4]](s16) 99 ; NO-FP16: [[INTRINSIC_TRUNC4:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT4]] 100 ; NO-FP16: [[FPTRUNC4:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC4]](s32) 101 ; NO-FP16: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[UV5]](s16) 102 ; NO-FP16: [[INTRINSIC_TRUNC5:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT5]] 103 ; NO-FP16: [[FPTRUNC5:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC5]](s32) 104 ; NO-FP16: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[UV6]](s16) 105 ; NO-FP16: [[INTRINSIC_TRUNC6:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT6]] 106 ; NO-FP16: [[FPTRUNC6:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC6]](s32) 107 ; NO-FP16: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[UV7]](s16) 108 ; NO-FP16: [[INTRINSIC_TRUNC7:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT7]] 109 ; NO-FP16: [[FPTRUNC7:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC7]](s32) 110 ; NO-FP16: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16), [[FPTRUNC4]](s16), [[FPTRUNC5]](s16), [[FPTRUNC6]](s16), [[FPTRUNC7]](s16) 111 ; NO-FP16: $q0 = COPY [[BUILD_VECTOR]](<8 x s16>) 112 ; NO-FP16: RET_ReallyLR implicit $q0 113 ; FP16-LABEL: name: test_v8f16.intrinsic_trunc 114 ; FP16: liveins: $q0 115 ; FP16: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0 116 ; FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<8 x s16>) = G_INTRINSIC_TRUNC [[COPY]] 117 ; FP16: $q0 = COPY [[INTRINSIC_TRUNC]](<8 x s16>) 118 ; FP16: RET_ReallyLR implicit $q0 119 %0:_(<8 x s16>) = COPY $q0 120 %1:_(<8 x s16>) = G_INTRINSIC_TRUNC %0 121 $q0 = COPY %1(<8 x s16>) 122 RET_ReallyLR implicit $q0 123 124... 125--- 126name: test_v2f32.intrinsic_trunc 127alignment: 4 128tracksRegLiveness: true 129machineFunctionInfo: {} 130body: | 131 bb.0: 132 liveins: $d0 133 134 ; NO-FP16-LABEL: name: test_v2f32.intrinsic_trunc 135 ; NO-FP16: liveins: $d0 136 ; NO-FP16: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0 137 ; NO-FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_TRUNC [[COPY]] 138 ; NO-FP16: $d0 = COPY [[INTRINSIC_TRUNC]](<2 x s32>) 139 ; NO-FP16: RET_ReallyLR implicit $d0 140 ; FP16-LABEL: name: test_v2f32.intrinsic_trunc 141 ; FP16: liveins: $d0 142 ; FP16: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0 143 ; FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_TRUNC [[COPY]] 144 ; FP16: $d0 = COPY [[INTRINSIC_TRUNC]](<2 x s32>) 145 ; FP16: RET_ReallyLR implicit $d0 146 %0:_(<2 x s32>) = COPY $d0 147 %1:_(<2 x s32>) = G_INTRINSIC_TRUNC %0 148 $d0 = COPY %1(<2 x s32>) 149 RET_ReallyLR implicit $d0 150 151... 152--- 153name: test_v4f32.intrinsic_trunc 154alignment: 4 155tracksRegLiveness: true 156machineFunctionInfo: {} 157body: | 158 bb.0: 159 liveins: $q0 160 161 ; NO-FP16-LABEL: name: test_v4f32.intrinsic_trunc 162 ; NO-FP16: liveins: $q0 163 ; NO-FP16: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0 164 ; NO-FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_TRUNC [[COPY]] 165 ; NO-FP16: $q0 = COPY [[INTRINSIC_TRUNC]](<4 x s32>) 166 ; NO-FP16: RET_ReallyLR implicit $q0 167 ; FP16-LABEL: name: test_v4f32.intrinsic_trunc 168 ; FP16: liveins: $q0 169 ; FP16: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0 170 ; FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_TRUNC [[COPY]] 171 ; FP16: $q0 = COPY [[INTRINSIC_TRUNC]](<4 x s32>) 172 ; FP16: RET_ReallyLR implicit $q0 173 %0:_(<4 x s32>) = COPY $q0 174 %1:_(<4 x s32>) = G_INTRINSIC_TRUNC %0 175 $q0 = COPY %1(<4 x s32>) 176 RET_ReallyLR implicit $q0 177 178... 179--- 180name: test_v2f64.intrinsic_trunc 181alignment: 4 182tracksRegLiveness: true 183machineFunctionInfo: {} 184body: | 185 bb.0: 186 liveins: $q0 187 188 ; NO-FP16-LABEL: name: test_v2f64.intrinsic_trunc 189 ; NO-FP16: liveins: $q0 190 ; NO-FP16: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0 191 ; NO-FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_TRUNC [[COPY]] 192 ; NO-FP16: $q0 = COPY [[INTRINSIC_TRUNC]](<2 x s64>) 193 ; NO-FP16: RET_ReallyLR implicit $q0 194 ; FP16-LABEL: name: test_v2f64.intrinsic_trunc 195 ; FP16: liveins: $q0 196 ; FP16: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0 197 ; FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_TRUNC [[COPY]] 198 ; FP16: $q0 = COPY [[INTRINSIC_TRUNC]](<2 x s64>) 199 ; FP16: RET_ReallyLR implicit $q0 200 %0:_(<2 x s64>) = COPY $q0 201 %1:_(<2 x s64>) = G_INTRINSIC_TRUNC %0 202 $q0 = COPY %1(<2 x s64>) 203 RET_ReallyLR implicit $q0 204