1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=aarch64-- -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s 3# RUN: llc -debugify-and-strip-all-safe -mtriple=aarch64-- -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s 4--- 5name: test_memcpy 6tracksRegLiveness: true 7body: | 8 bb.1: 9 liveins: $w2, $x0, $x1 10 11 ; CHECK-LABEL: name: test_memcpy 12 ; CHECK: liveins: $w2, $x0, $x1 13 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0 14 ; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1 15 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2 16 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY2]](s32) 17 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp 18 ; CHECK: $x0 = COPY [[COPY]](p0) 19 ; CHECK: $x1 = COPY [[COPY1]](p0) 20 ; CHECK: $x2 = COPY [[ZEXT]](s64) 21 ; CHECK: BL &memcpy, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x0, implicit $x1, implicit $x2 22 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp 23 ; CHECK: RET_ReallyLR 24 %0:_(p0) = COPY $x0 25 %1:_(p0) = COPY $x1 26 %2:_(s32) = COPY $w2 27 %3:_(s64) = G_ZEXT %2(s32) 28 G_MEMCPY %0(p0), %1(p0), %3(s64), 0 :: (store unknown-size), (load unknown-size) 29 RET_ReallyLR 30 31... 32--- 33name: test_memcpy_tail 34tracksRegLiveness: true 35body: | 36 bb.1: 37 liveins: $w2, $x0, $x1 38 39 ; CHECK-LABEL: name: test_memcpy_tail 40 ; CHECK: liveins: $w2, $x0, $x1 41 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0 42 ; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1 43 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2 44 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY2]](s32) 45 ; CHECK: $x0 = COPY [[COPY]](p0) 46 ; CHECK: $x1 = COPY [[COPY1]](p0) 47 ; CHECK: $x2 = COPY [[ZEXT]](s64) 48 ; CHECK: TCRETURNdi &memcpy, 0, csr_aarch64_aapcs, implicit $sp, implicit $x0, implicit $x1, implicit $x2 49 %0:_(p0) = COPY $x0 50 %1:_(p0) = COPY $x1 51 %2:_(s32) = COPY $w2 52 %3:_(s64) = G_ZEXT %2(s32) 53 G_MEMCPY %0(p0), %1(p0), %3(s64), 1 :: (store unknown-size), (load unknown-size) 54 RET_ReallyLR 55 56... 57--- 58name: test_memmove 59tracksRegLiveness: true 60body: | 61 bb.1: 62 liveins: $w2, $x0, $x1 63 64 ; CHECK-LABEL: name: test_memmove 65 ; CHECK: liveins: $w2, $x0, $x1 66 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0 67 ; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1 68 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2 69 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY2]](s32) 70 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp 71 ; CHECK: $x0 = COPY [[COPY]](p0) 72 ; CHECK: $x1 = COPY [[COPY1]](p0) 73 ; CHECK: $x2 = COPY [[ZEXT]](s64) 74 ; CHECK: BL &memmove, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x0, implicit $x1, implicit $x2 75 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp 76 ; CHECK: RET_ReallyLR 77 %0:_(p0) = COPY $x0 78 %1:_(p0) = COPY $x1 79 %2:_(s32) = COPY $w2 80 %3:_(s64) = G_ZEXT %2(s32) 81 G_MEMMOVE %0(p0), %1(p0), %3(s64), 0 :: (store unknown-size), (load unknown-size) 82 RET_ReallyLR 83 84... 85--- 86name: test_memset 87tracksRegLiveness: true 88body: | 89 bb.1: 90 liveins: $w1, $w2, $x0 91 92 ; CHECK-LABEL: name: test_memset 93 ; CHECK: liveins: $w1, $w2, $x0 94 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0 95 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1 96 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2 97 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY2]](s32) 98 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp 99 ; CHECK: $x0 = COPY [[COPY]](p0) 100 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 101 ; CHECK: $w1 = COPY [[COPY3]](s32) 102 ; CHECK: $x2 = COPY [[ZEXT]](s64) 103 ; CHECK: BL &memset, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x0, implicit $w1, implicit $x2 104 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp 105 ; CHECK: RET_ReallyLR 106 %0:_(p0) = COPY $x0 107 %1:_(s32) = COPY $w1 108 %2:_(s32) = COPY $w2 109 %3:_(s8) = G_TRUNC %1(s32) 110 %4:_(s64) = G_ZEXT %2(s32) 111 G_MEMSET %0(p0), %3(s8), %4(s64), 0 :: (store unknown-size) 112 RET_ReallyLR 113 114... 115--- 116name: no_tail_call 117tracksRegLiveness: true 118body: | 119 bb.1: 120 liveins: $w2, $x0, $x1 121 122 ; CHECK-LABEL: name: no_tail_call 123 ; CHECK: liveins: $w2, $x0, $x1 124 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0 125 ; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1 126 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2 127 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY2]](s32) 128 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp 129 ; CHECK: $x0 = COPY [[COPY]](p0) 130 ; CHECK: $x1 = COPY [[COPY1]](p0) 131 ; CHECK: $x2 = COPY [[ZEXT]](s64) 132 ; CHECK: BL &memcpy, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x0, implicit $x1, implicit $x2 133 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp 134 ; CHECK: $x0 = COPY [[ZEXT]](s64) 135 ; CHECK: RET_ReallyLR implicit $x0 136 %0:_(p0) = COPY $x0 137 %1:_(p0) = COPY $x1 138 %2:_(s32) = COPY $w2 139 %3:_(s64) = G_ZEXT %2(s32) 140 G_MEMCPY %0(p0), %1(p0), %3(s64), 1 :: (store unknown-size), (load unknown-size) 141 $x0 = COPY %3 142 RET_ReallyLR implicit $x0 143 144... 145--- 146name: dont_tc_twice 147tracksRegLiveness: true 148body: | 149 bb.1: 150 liveins: $w2, $x0, $x1 151 ; CHECK-LABEL: name: dont_tc_twice 152 ; CHECK: liveins: $w2, $x0, $x1 153 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0 154 ; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1 155 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2 156 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY2]](s32) 157 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp 158 ; CHECK: $x0 = COPY [[COPY]](p0) 159 ; CHECK: $x1 = COPY [[COPY1]](p0) 160 ; CHECK: $x2 = COPY [[ZEXT]](s64) 161 ; CHECK: BL &memcpy, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x0, implicit $x1, implicit $x2 162 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp 163 ; CHECK: TCRETURNdi &memset, 0, csr_aarch64_aapcs, implicit $sp 164 %0:_(p0) = COPY $x0 165 %1:_(p0) = COPY $x1 166 %2:_(s32) = COPY $w2 167 %4:_(s1) = G_CONSTANT i1 false 168 %3:_(s64) = G_ZEXT %2(s32) 169 G_MEMCPY %0(p0), %1(p0), %3(s64), 1 :: (store unknown-size), (load unknown-size) 170 TCRETURNdi &memset, 0, csr_aarch64_aapcs, implicit $sp 171