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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-lowering -verify-machineinstrs %s -o - | FileCheck %s
3#
4# Check that we produce G_TRN1 or G_TRN2 when we have an appropriate shuffle
5# mask.
6#
7
8...
9---
10name:            trn1_v8s8
11alignment:       4
12legalized:       true
13tracksRegLiveness: true
14body:             |
15  bb.1.entry:
16    liveins: $d0, $d1
17    ; CHECK-LABEL: name: trn1_v8s8
18    ; CHECK: liveins: $d0, $d1
19    ; CHECK: [[COPY:%[0-9]+]]:_(<8 x s8>) = COPY $d0
20    ; CHECK: [[COPY1:%[0-9]+]]:_(<8 x s8>) = COPY $d1
21    ; CHECK: [[TRN1_:%[0-9]+]]:_(<8 x s8>) = G_TRN1 [[COPY]], [[COPY1]]
22    ; CHECK: $d0 = COPY [[TRN1_]](<8 x s8>)
23    ; CHECK: RET_ReallyLR implicit $q0
24    %0:_(<8 x s8>) = COPY $d0
25    %1:_(<8 x s8>) = COPY $d1
26    %2:_(<8 x s8>) = G_SHUFFLE_VECTOR %0(<8 x s8>), %1, shufflemask(0, 8, 2, 10, 4, 12, 6, 14)
27    $d0 = COPY %2(<8 x s8>)
28    RET_ReallyLR implicit $q0
29
30...
31---
32name:            trn2_v8s8
33alignment:       4
34legalized:       true
35tracksRegLiveness: true
36body:             |
37  bb.1.entry:
38    liveins: $d0, $d1
39    ; CHECK-LABEL: name: trn2_v8s8
40    ; CHECK: liveins: $d0, $d1
41    ; CHECK: [[COPY:%[0-9]+]]:_(<8 x s8>) = COPY $d0
42    ; CHECK: [[COPY1:%[0-9]+]]:_(<8 x s8>) = COPY $d1
43    ; CHECK: [[TRN2_:%[0-9]+]]:_(<8 x s8>) = G_TRN2 [[COPY]], [[COPY1]]
44    ; CHECK: $d0 = COPY [[TRN2_]](<8 x s8>)
45    ; CHECK: RET_ReallyLR implicit $q0
46    %0:_(<8 x s8>) = COPY $d0
47    %1:_(<8 x s8>) = COPY $d1
48    %2:_(<8 x s8>) = G_SHUFFLE_VECTOR %0(<8 x s8>), %1, shufflemask(1, 9, 3, 11, 5, 13, 7, 15)
49    $d0 = COPY %2(<8 x s8>)
50    RET_ReallyLR implicit $q0
51
52...
53---
54name:            trn1_v16s8
55alignment:       4
56legalized:       true
57tracksRegLiveness: true
58body:             |
59  bb.1.entry:
60    liveins: $q0, $q1
61    ; CHECK-LABEL: name: trn1_v16s8
62    ; CHECK: liveins: $q0, $q1
63    ; CHECK: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0
64    ; CHECK: [[COPY1:%[0-9]+]]:_(<16 x s8>) = COPY $q1
65    ; CHECK: [[TRN1_:%[0-9]+]]:_(<16 x s8>) = G_TRN1 [[COPY]], [[COPY1]]
66    ; CHECK: $q0 = COPY [[TRN1_]](<16 x s8>)
67    ; CHECK: RET_ReallyLR implicit $q0
68    %0:_(<16 x s8>) = COPY $q0
69    %1:_(<16 x s8>) = COPY $q1
70    %2:_(<16 x s8>) = G_SHUFFLE_VECTOR %0(<16 x s8>), %1, shufflemask(0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30)
71    $q0 = COPY %2(<16 x s8>)
72    RET_ReallyLR implicit $q0
73
74...
75---
76name:            trn2_v16s8
77alignment:       4
78legalized:       true
79tracksRegLiveness: true
80body:             |
81  bb.1.entry:
82    liveins: $q0, $q1
83    ; CHECK-LABEL: name: trn2_v16s8
84    ; CHECK: liveins: $q0, $q1
85    ; CHECK: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0
86    ; CHECK: [[COPY1:%[0-9]+]]:_(<16 x s8>) = COPY $q1
87    ; CHECK: [[TRN2_:%[0-9]+]]:_(<16 x s8>) = G_TRN2 [[COPY]], [[COPY1]]
88    ; CHECK: $q0 = COPY [[TRN2_]](<16 x s8>)
89    ; CHECK: RET_ReallyLR implicit $q0
90    %0:_(<16 x s8>) = COPY $q0
91    %1:_(<16 x s8>) = COPY $q1
92    %2:_(<16 x s8>) = G_SHUFFLE_VECTOR %0(<16 x s8>), %1, shufflemask(1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31)
93    $q0 = COPY %2(<16 x s8>)
94    RET_ReallyLR implicit $q0
95
96...
97---
98name:            trn1_v4s32
99alignment:       4
100legalized:       true
101tracksRegLiveness: true
102body:             |
103  bb.1.entry:
104    liveins: $q0, $q1
105    ; CHECK-LABEL: name: trn1_v4s32
106    ; CHECK: liveins: $q0, $q1
107    ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
108    ; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
109    ; CHECK: [[TRN1_:%[0-9]+]]:_(<4 x s32>) = G_TRN1 [[COPY]], [[COPY1]]
110    ; CHECK: $q0 = COPY [[TRN1_]](<4 x s32>)
111    ; CHECK: RET_ReallyLR implicit $q0
112    %0:_(<4 x s32>) = COPY $q0
113    %1:_(<4 x s32>) = COPY $q1
114    %2:_(<4 x s32>) = G_SHUFFLE_VECTOR %0(<4 x s32>), %1, shufflemask(0, 4, 2, 6)
115    $q0 = COPY %2(<4 x s32>)
116    RET_ReallyLR implicit $q0
117
118...
119---
120name:            trn2_v4s32
121alignment:       4
122legalized:       true
123tracksRegLiveness: true
124body:             |
125  bb.1.entry:
126    liveins: $q0, $q1
127    ; CHECK-LABEL: name: trn2_v4s32
128    ; CHECK: liveins: $q0, $q1
129    ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
130    ; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
131    ; CHECK: [[TRN2_:%[0-9]+]]:_(<4 x s32>) = G_TRN2 [[COPY]], [[COPY1]]
132    ; CHECK: $q0 = COPY [[TRN2_]](<4 x s32>)
133    ; CHECK: RET_ReallyLR implicit $q0
134    %0:_(<4 x s32>) = COPY $q0
135    %1:_(<4 x s32>) = COPY $q1
136    %2:_(<4 x s32>) = G_SHUFFLE_VECTOR %0(<4 x s32>), %1, shufflemask(1, 5, 3, 7)
137    $q0 = COPY %2(<4 x s32>)
138    RET_ReallyLR implicit $q0
139
140...
141---
142name:            redundant_with_zip1
143alignment:       4
144legalized:       true
145tracksRegLiveness: true
146body:             |
147  bb.1.entry:
148    liveins: $d0, $d1
149    ; 2 x s32 TRN is redundant with ZIP. Make sure we prioritize ZIP.
150    ;
151    ; CHECK-LABEL: name: redundant_with_zip1
152    ; CHECK: liveins: $d0, $d1
153    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
154    ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1
155    ; CHECK: [[ZIP1_:%[0-9]+]]:_(<2 x s32>) = G_ZIP1 [[COPY]], [[COPY1]]
156    ; CHECK: $d0 = COPY [[ZIP1_]](<2 x s32>)
157    ; CHECK: RET_ReallyLR implicit $d0
158    %0:_(<2 x s32>) = COPY $d0
159    %1:_(<2 x s32>) = COPY $d1
160    %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1, shufflemask(0, 2)
161    $d0 = COPY %2(<2 x s32>)
162    RET_ReallyLR implicit $d0
163
164...
165---
166name:            redundant_with_zip2
167alignment:       4
168legalized:       true
169tracksRegLiveness: true
170body:             |
171  bb.1.entry:
172    liveins: $d0, $d1
173    ; 2 x s32 TRN is redundant with ZIP. Make sure we prioritize ZIP.
174    ;
175    ; CHECK-LABEL: name: redundant_with_zip2
176    ; CHECK: liveins: $d0, $d1
177    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
178    ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1
179    ; CHECK: [[ZIP2_:%[0-9]+]]:_(<2 x s32>) = G_ZIP2 [[COPY]], [[COPY1]]
180    ; CHECK: $d0 = COPY [[ZIP2_]](<2 x s32>)
181    ; CHECK: RET_ReallyLR implicit $d0
182    %0:_(<2 x s32>) = COPY $d0
183    %1:_(<2 x s32>) = COPY $d1
184    %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1, shufflemask(1, 3)
185    $d0 = COPY %2(<2 x s32>)
186    RET_ReallyLR implicit $d0
187
188...
189---
190name:            trn1_undef
191alignment:       4
192legalized:       true
193tracksRegLiveness: true
194body:             |
195  bb.1.entry:
196    liveins: $d0, $d1
197    ; Undef shuffle indices should not prevent matching to G_TRN1.
198    ;
199    ; CHECK-LABEL: name: trn1_undef
200    ; CHECK: liveins: $d0, $d1
201    ; CHECK: [[COPY:%[0-9]+]]:_(<8 x s8>) = COPY $d0
202    ; CHECK: [[COPY1:%[0-9]+]]:_(<8 x s8>) = COPY $d1
203    ; CHECK: [[TRN1_:%[0-9]+]]:_(<8 x s8>) = G_TRN1 [[COPY]], [[COPY1]]
204    ; CHECK: $d0 = COPY [[TRN1_]](<8 x s8>)
205    ; CHECK: RET_ReallyLR implicit $d0
206    %0:_(<8 x s8>) = COPY $d0
207    %1:_(<8 x s8>) = COPY $d1
208    %2:_(<8 x s8>) = G_SHUFFLE_VECTOR %0(<8 x s8>), %1, shufflemask(0, 8, -1, -1, 4, 12, 6, 14)
209    $d0 = COPY %2(<8 x s8>)
210    RET_ReallyLR implicit $d0
211
212...
213---
214name:            trn2_undef
215alignment:       4
216legalized:       true
217tracksRegLiveness: true
218body:             |
219  bb.1.entry:
220    liveins: $d0, $d1
221    ; Undef shuffle indices should not prevent matching to G_TRN2.
222    ;
223    ; CHECK-LABEL: name: trn2_undef
224    ; CHECK: liveins: $d0, $d1
225    ; CHECK: [[COPY:%[0-9]+]]:_(<8 x s8>) = COPY $d0
226    ; CHECK: [[COPY1:%[0-9]+]]:_(<8 x s8>) = COPY $d1
227    ; CHECK: [[TRN2_:%[0-9]+]]:_(<8 x s8>) = G_TRN2 [[COPY]], [[COPY1]]
228    ; CHECK: $d0 = COPY [[TRN2_]](<8 x s8>)
229    ; CHECK: RET_ReallyLR implicit $d0
230    %0:_(<8 x s8>) = COPY $d0
231    %1:_(<8 x s8>) = COPY $d1
232    %2:_(<8 x s8>) = G_SHUFFLE_VECTOR %0(<8 x s8>), %1, shufflemask(1, -1, 3, 11, 5, 13, -1, -1)
233    $d0 = COPY %2(<8 x s8>)
234    RET_ReallyLR implicit $d0
235