1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3 4... 5--- 6name: bswap_s32 7legalized: true 8regBankSelected: true 9 10registers: 11 - { id: 0, class: gpr } 12 - { id: 1, class: gpr } 13 14body: | 15 bb.0: 16 liveins: $w0 17 18 ; CHECK-LABEL: name: bswap_s32 19 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 20 ; CHECK: [[REVWr:%[0-9]+]]:gpr32 = REVWr [[COPY]] 21 ; CHECK: $w0 = COPY [[REVWr]] 22 %0(s32) = COPY $w0 23 %1(s32) = G_BSWAP %0 24 $w0 = COPY %1 25... 26 27--- 28name: bswap_s64 29legalized: true 30regBankSelected: true 31 32registers: 33 - { id: 0, class: gpr } 34 - { id: 1, class: gpr } 35 36body: | 37 bb.0: 38 liveins: $x0 39 40 ; CHECK-LABEL: name: bswap_s64 41 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 42 ; CHECK: [[REVXr:%[0-9]+]]:gpr64 = REVXr [[COPY]] 43 ; CHECK: $x0 = COPY [[REVXr]] 44 %0(s64) = COPY $x0 45 %1(s64) = G_BSWAP %0 46 $x0 = COPY %1 47 48... 49--- 50name: bswap_v4s32 51alignment: 4 52legalized: true 53regBankSelected: true 54tracksRegLiveness: true 55machineFunctionInfo: {} 56body: | 57 bb.0: 58 liveins: $q0 59 60 ; CHECK-LABEL: name: bswap_v4s32 61 ; CHECK: liveins: $q0 62 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 63 ; CHECK: [[REV32v16i8_:%[0-9]+]]:fpr128 = REV32v16i8 [[COPY]] 64 ; CHECK: $q0 = COPY [[REV32v16i8_]] 65 ; CHECK: RET_ReallyLR implicit $q0 66 %0:fpr(<4 x s32>) = COPY $q0 67 %1:fpr(<4 x s32>) = G_BSWAP %0 68 $q0 = COPY %1(<4 x s32>) 69 RET_ReallyLR implicit $q0 70 71... 72--- 73name: bswap_v2s32 74alignment: 4 75legalized: true 76regBankSelected: true 77tracksRegLiveness: true 78machineFunctionInfo: {} 79body: | 80 bb.0: 81 liveins: $d0 82 83 ; CHECK-LABEL: name: bswap_v2s32 84 ; CHECK: liveins: $d0 85 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 86 ; CHECK: [[REV32v8i8_:%[0-9]+]]:fpr64 = REV32v8i8 [[COPY]] 87 ; CHECK: $d0 = COPY [[REV32v8i8_]] 88 ; CHECK: RET_ReallyLR implicit $d0 89 %0:fpr(<2 x s32>) = COPY $d0 90 %1:fpr(<2 x s32>) = G_BSWAP %0 91 $d0 = COPY %1(<2 x s32>) 92 RET_ReallyLR implicit $d0 93 94... 95--- 96name: bswap_v2s64 97alignment: 4 98legalized: true 99regBankSelected: true 100tracksRegLiveness: true 101machineFunctionInfo: {} 102body: | 103 bb.0: 104 liveins: $q0 105 106 ; CHECK-LABEL: name: bswap_v2s64 107 ; CHECK: liveins: $q0 108 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 109 ; CHECK: [[REV64v16i8_:%[0-9]+]]:fpr128 = REV64v16i8 [[COPY]] 110 ; CHECK: $q0 = COPY [[REV64v16i8_]] 111 ; CHECK: RET_ReallyLR implicit $q0 112 %0:fpr(<2 x s64>) = COPY $q0 113 %1:fpr(<2 x s64>) = G_BSWAP %0 114 $q0 = COPY %1(<2 x s64>) 115 RET_ReallyLR implicit $q0 116 117... 118