1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3 4--- | 5 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" 6 7 define void @zextload_s32_from_s16(i16 *%addr) { ret void } 8 define void @zextload_s32_from_s16_not_combined(i16 *%addr) { ret void } 9 10 define i64 @i32_to_i64(i32* %ptr) { 11 %ld = load i32, i32* %ptr, align 4 12 %val = zext i32 %ld to i64 13 ret i64 %val 14 } 15 16 define i64 @i16_to_i64(i16* %ptr) { 17 %ld = load i16, i16* %ptr, align 2 18 %val = zext i16 %ld to i64 19 ret i64 %val 20 } 21 22 define i64 @i8_to_i64(i8* %ptr) { 23 %ld = load i8, i8* %ptr, align 1 24 %val = zext i8 %ld to i64 25 ret i64 %val 26 } 27 28 define i32 @i8_to_i32(i8* %ptr) { 29 %ld = load i8, i8* %ptr, align 1 30 %val = zext i8 %ld to i32 31 ret i32 %val 32 } 33 34 define i32 @i16_to_i32(i16* %ptr) { 35 %ld = load i16, i16* %ptr, align 2 36 %val = zext i16 %ld to i32 37 ret i32 %val 38 } 39 40... 41 42--- 43name: zextload_s32_from_s16 44legalized: true 45regBankSelected: true 46 47body: | 48 bb.0: 49 liveins: $x0 50 51 ; CHECK-LABEL: name: zextload_s32_from_s16 52 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 53 ; CHECK: [[LDRHHui:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 0 :: (load 2 from %ir.addr) 54 ; CHECK: $w0 = COPY [[LDRHHui]] 55 %0:gpr(p0) = COPY $x0 56 %1:gpr(s32) = G_ZEXTLOAD %0 :: (load 2 from %ir.addr) 57 $w0 = COPY %1(s32) 58... 59--- 60name: zextload_s32_from_s16_not_combined 61legalized: true 62regBankSelected: true 63 64body: | 65 bb.0: 66 liveins: $x0 67 68 ; CHECK-LABEL: name: zextload_s32_from_s16_not_combined 69 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 70 ; CHECK: [[LDRHHui:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 0 :: (load 2 from %ir.addr) 71 ; CHECK: [[COPY1:%[0-9]+]]:gpr32all = COPY [[LDRHHui]] 72 ; CHECK: $w0 = COPY [[COPY1]] 73 %0:gpr(p0) = COPY $x0 74 %1:gpr(s16) = G_LOAD %0 :: (load 2 from %ir.addr) 75 %2:gpr(s32) = G_ZEXT %1 76 $w0 = COPY %2(s32) 77... 78--- 79name: i32_to_i64 80legalized: true 81regBankSelected: true 82body: | 83 bb.1 (%ir-block.0): 84 liveins: $x0 85 86 ; CHECK-LABEL: name: i32_to_i64 87 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 88 ; CHECK: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load 4 from %ir.ptr) 89 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDRWui]], %subreg.sub_32 90 ; CHECK: $x0 = COPY [[SUBREG_TO_REG]] 91 ; CHECK: RET_ReallyLR implicit $x0 92 %0:gpr(p0) = COPY $x0 93 %2:gpr(s64) = G_ZEXTLOAD %0(p0) :: (load 4 from %ir.ptr) 94 $x0 = COPY %2(s64) 95 RET_ReallyLR implicit $x0 96 97... 98--- 99name: i16_to_i64 100legalized: true 101regBankSelected: true 102body: | 103 bb.1 (%ir-block.0): 104 liveins: $x0 105 106 ; CHECK-LABEL: name: i16_to_i64 107 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 108 ; CHECK: [[LDRHHui:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 0 :: (load 2 from %ir.ptr) 109 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDRHHui]], %subreg.sub_32 110 ; CHECK: $x0 = COPY [[SUBREG_TO_REG]] 111 ; CHECK: RET_ReallyLR implicit $x0 112 %0:gpr(p0) = COPY $x0 113 %2:gpr(s64) = G_ZEXTLOAD %0(p0) :: (load 2 from %ir.ptr) 114 $x0 = COPY %2(s64) 115 RET_ReallyLR implicit $x0 116 117... 118--- 119name: i8_to_i64 120legalized: true 121regBankSelected: true 122body: | 123 bb.1 (%ir-block.0): 124 liveins: $x0 125 126 ; CHECK-LABEL: name: i8_to_i64 127 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 128 ; CHECK: [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[COPY]], 0 :: (load 1 from %ir.ptr) 129 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDRBBui]], %subreg.sub_32 130 ; CHECK: $x0 = COPY [[SUBREG_TO_REG]] 131 ; CHECK: RET_ReallyLR implicit $x0 132 %0:gpr(p0) = COPY $x0 133 %2:gpr(s64) = G_ZEXTLOAD %0(p0) :: (load 1 from %ir.ptr) 134 $x0 = COPY %2(s64) 135 RET_ReallyLR implicit $x0 136 137... 138--- 139name: i8_to_i32 140legalized: true 141regBankSelected: true 142body: | 143 bb.1 (%ir-block.0): 144 liveins: $x0 145 146 ; CHECK-LABEL: name: i8_to_i32 147 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 148 ; CHECK: [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[COPY]], 0 :: (load 1 from %ir.ptr) 149 ; CHECK: $w0 = COPY [[LDRBBui]] 150 ; CHECK: RET_ReallyLR implicit $w0 151 %0:gpr(p0) = COPY $x0 152 %2:gpr(s32) = G_ZEXTLOAD %0(p0) :: (load 1 from %ir.ptr) 153 $w0 = COPY %2(s32) 154 RET_ReallyLR implicit $w0 155 156... 157--- 158name: i16_to_i32 159legalized: true 160regBankSelected: true 161body: | 162 bb.1 (%ir-block.0): 163 liveins: $x0 164 165 ; CHECK-LABEL: name: i16_to_i32 166 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 167 ; CHECK: [[LDRHHui:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 0 :: (load 2 from %ir.ptr) 168 ; CHECK: $w0 = COPY [[LDRHHui]] 169 ; CHECK: RET_ReallyLR implicit $w0 170 %0:gpr(p0) = COPY $x0 171 %2:gpr(s32) = G_ZEXTLOAD %0(p0) :: (load 2 from %ir.ptr) 172 $w0 = COPY %2(s32) 173 RET_ReallyLR implicit $w0 174 175... 176