1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple aarch64-unknown-unknown -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3# 4# Test that we can produce a TBNZ when we have a slt compare against 0. 5# 6# The bit tested should be the size of the test register minus 1. 7# 8 9... 10--- 11name: tbnzx_slt 12alignment: 4 13legalized: true 14regBankSelected: true 15body: | 16 ; CHECK-LABEL: name: tbnzx_slt 17 ; CHECK: bb.0: 18 ; CHECK: successors: %bb.0(0x40000000), %bb.1(0x40000000) 19 ; CHECK: %copy:gpr64 = COPY $x0 20 ; CHECK: TBNZX %copy, 63, %bb.1 21 ; CHECK: B %bb.0 22 ; CHECK: bb.1: 23 ; CHECK: RET_ReallyLR 24 bb.0: 25 successors: %bb.0, %bb.1 26 liveins: $x0 27 %copy:gpr(s64) = COPY $x0 28 %zero:gpr(s64) = G_CONSTANT i64 0 29 %cmp:gpr(s32) = G_ICMP intpred(slt), %copy(s64), %zero 30 %cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32) 31 G_BRCOND %cmp_trunc(s1), %bb.1 32 G_BR %bb.0 33 bb.1: 34 RET_ReallyLR 35 36... 37--- 38name: tbnzw_slt 39alignment: 4 40legalized: true 41regBankSelected: true 42body: | 43 ; CHECK-LABEL: name: tbnzw_slt 44 ; CHECK: bb.0: 45 ; CHECK: successors: %bb.0(0x40000000), %bb.1(0x40000000) 46 ; CHECK: %copy:gpr32 = COPY $w0 47 ; CHECK: TBNZW %copy, 31, %bb.1 48 ; CHECK: B %bb.0 49 ; CHECK: bb.1: 50 ; CHECK: RET_ReallyLR 51 bb.0: 52 successors: %bb.0, %bb.1 53 liveins: $x0 54 %copy:gpr(s32) = COPY $w0 55 %zero:gpr(s32) = G_CONSTANT i32 0 56 %cmp:gpr(s32) = G_ICMP intpred(slt), %copy(s32), %zero 57 %cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32) 58 G_BRCOND %cmp_trunc(s1), %bb.1 59 G_BR %bb.0 60 bb.1: 61 RET_ReallyLR 62 63... 64--- 65name: no_tbnz_not_zero 66alignment: 4 67legalized: true 68regBankSelected: true 69body: | 70 ; CHECK-LABEL: name: no_tbnz_not_zero 71 ; CHECK: bb.0: 72 ; CHECK: successors: %bb.0(0x40000000), %bb.1(0x40000000) 73 ; CHECK: %copy:gpr32sp = COPY $w0 74 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri %copy, 1, 0, implicit-def $nzcv 75 ; CHECK: Bcc 11, %bb.1, implicit $nzcv 76 ; CHECK: B %bb.0 77 ; CHECK: bb.1: 78 ; CHECK: RET_ReallyLR 79 bb.0: 80 successors: %bb.0, %bb.1 81 liveins: $x0 82 %copy:gpr(s32) = COPY $w0 83 %one:gpr(s32) = G_CONSTANT i32 1 84 %cmp:gpr(s32) = G_ICMP intpred(slt), %copy(s32), %one 85 %cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32) 86 G_BRCOND %cmp_trunc(s1), %bb.1 87 G_BR %bb.0 88 bb.1: 89 RET_ReallyLR 90 91... 92--- 93name: dont_fold_and 94alignment: 4 95legalized: true 96regBankSelected: true 97body: | 98 ; CHECK-LABEL: name: dont_fold_and 99 ; CHECK: bb.0: 100 ; CHECK: successors: %bb.0(0x40000000), %bb.1(0x40000000) 101 ; CHECK: %copy:gpr64 = COPY $x0 102 ; CHECK: [[ANDSXri:%[0-9]+]]:gpr64 = ANDSXri %copy, 8000, implicit-def $nzcv 103 ; CHECK: Bcc 11, %bb.1, implicit $nzcv 104 ; CHECK: B %bb.0 105 ; CHECK: bb.1: 106 ; CHECK: RET_ReallyLR 107 bb.0: 108 successors: %bb.0, %bb.1 109 liveins: $x0 110 %copy:gpr(s64) = COPY $x0 111 %bit:gpr(s64) = G_CONSTANT i64 8 112 %zero:gpr(s64) = G_CONSTANT i64 0 113 %c:gpr(s64) = G_CONSTANT i64 8 114 %and:gpr(s64) = G_AND %copy, %bit 115 %cmp:gpr(s32) = G_ICMP intpred(slt), %and(s64), %zero 116 %cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32) 117 G_BRCOND %cmp_trunc(s1), %bb.1 118 G_BR %bb.0 119 bb.1: 120 RET_ReallyLR 121 122... 123--- 124name: dont_commute 125alignment: 4 126legalized: true 127regBankSelected: true 128body: | 129 ; CHECK-LABEL: name: dont_commute 130 ; CHECK: bb.0: 131 ; CHECK: successors: %bb.0(0x40000000), %bb.1(0x40000000) 132 ; CHECK: %copy:gpr64 = COPY $x0 133 ; CHECK: %zero:gpr64 = COPY $xzr 134 ; CHECK: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr %zero, %copy, implicit-def $nzcv 135 ; CHECK: Bcc 11, %bb.1, implicit $nzcv 136 ; CHECK: B %bb.0 137 ; CHECK: bb.1: 138 ; CHECK: RET_ReallyLR 139 bb.0: 140 successors: %bb.0, %bb.1 141 liveins: $x0 142 %copy:gpr(s64) = COPY $x0 143 %zero:gpr(s64) = G_CONSTANT i64 0 144 %cmp:gpr(s32) = G_ICMP intpred(slt), %zero, %copy(s64) 145 %cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32) 146 G_BRCOND %cmp_trunc(s1), %bb.1 147 G_BR %bb.0 148 bb.1: 149 RET_ReallyLR 150