1; RUN: llc --debugify-and-strip-all-safe=0 -mtriple=arm64-- -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 | \ 2; RUN: grep -v "Verify generated machine code" | FileCheck %s 3 4; REQUIRES: asserts 5 6; CHECK-LABEL: Pass Arguments: 7; CHECK-NEXT: Target Library Information 8; CHECK-NEXT: Target Pass Configuration 9; CHECK-NEXT: Machine Module Information 10; CHECK-NEXT: Target Transform Information 11; CHECK-NEXT: Create Garbage Collector Module Metadata 12; CHECK-NEXT: Assumption Cache Tracker 13; CHECK-NEXT: Profile summary info 14; CHECK-NEXT: Machine Branch Probability Analysis 15; CHECK-NEXT: ModulePass Manager 16; CHECK-NEXT: Pre-ISel Intrinsic Lowering 17; CHECK-NEXT: FunctionPass Manager 18; CHECK-NEXT: Expand Atomic instructions 19; CHECK-NEXT: Module Verifier 20; CHECK-NEXT: Lower Garbage Collection Instructions 21; CHECK-NEXT: Shadow Stack GC Lowering 22; CHECK-NEXT: Lower constant intrinsics 23; CHECK-NEXT: Remove unreachable blocks from the CFG 24; CHECK-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining) 25; CHECK-NEXT: Scalarize Masked Memory Intrinsics 26; CHECK-NEXT: Expand reduction intrinsics 27; CHECK-NEXT: AArch64 Stack Tagging 28; CHECK-NEXT: Rewrite Symbols 29; CHECK-NEXT: FunctionPass Manager 30; CHECK-NEXT: Exception handling preparation 31; CHECK-NEXT: Safe Stack instrumentation pass 32; CHECK-NEXT: Insert stack protectors 33; CHECK-NEXT: Module Verifier 34; CHECK-NEXT: Analysis containing CSE Info 35; CHECK-NEXT: IRTranslator 36; CHECK-NEXT: Analysis for ComputingKnownBits 37; CHECK-NEXT: AArch64PreLegalizerCombiner 38; CHECK-NEXT: Analysis containing CSE Info 39; CHECK-NEXT: Legalizer 40; CHECK-NEXT: AArch64PostLegalizerLowering 41; CHECK-NEXT: RegBankSelect 42; CHECK-NEXT: Localizer 43; CHECK-NEXT: Analysis for ComputingKnownBits 44; CHECK-NEXT: InstructionSelect 45; CHECK-NEXT: ResetMachineFunction 46; CHECK-NEXT: AArch64 Instruction Selection 47; CHECK-NEXT: Finalize ISel and expand pseudo-instructions 48; CHECK-NEXT: Local Stack Slot Allocation 49; CHECK-NEXT: Eliminate PHI nodes for register allocation 50; CHECK-NEXT: Two-Address instruction pass 51; CHECK-NEXT: Fast Register Allocator 52; CHECK-NEXT: Fixup Statepoint Caller Saved 53; CHECK-NEXT: Lazy Machine Block Frequency Analysis 54; CHECK-NEXT: Machine Optimization Remark Emitter 55; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization 56; CHECK-NEXT: Post-RA pseudo instruction expansion pass 57; CHECK-NEXT: AArch64 pseudo instruction expansion pass 58; CHECK-NEXT: AArch64 speculation hardening pass 59; CHECK-NEXT: AArch64 Indirect Thunks 60; CHECK-NEXT: AArch64 sls hardening pass 61; CHECK-NEXT: Analyze Machine Code For Garbage Collection 62; CHECK-NEXT: Insert fentry calls 63; CHECK-NEXT: Insert XRay ops 64; CHECK-NEXT: Implement the 'patchable-function' attribute 65; CHECK-NEXT: AArch64 Branch Targets 66; CHECK-NEXT: Branch relaxation pass 67; CHECK-NEXT: Unpack machine instruction bundles 68; CHECK-NEXT: Contiguously Lay Out Funclets 69; CHECK-NEXT: StackMap Liveness Analysis 70; CHECK-NEXT: Live DEBUG_VALUE analysis 71; CHECK-NEXT: Lazy Machine Block Frequency Analysis 72; CHECK-NEXT: Machine Optimization Remark Emitter 73; CHECK-NEXT: AArch64 Assembly Printer 74; CHECK-NEXT: Free MachineFunction 75 76define void @f() { 77 ret void 78} 79