1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s 3 4; BIT Bitwise Insert if True 5; 6; 8-bit vectors tests 7 8define <1 x i8> @test_bit_v1i8(<1 x i8> %A, <1 x i8> %B, <1 x i8> %C) { 9; CHECK-LABEL: test_bit_v1i8: 10; CHECK: // %bb.0: 11; CHECK-NEXT: bit v0.8b, v1.8b, v2.8b 12; CHECK-NEXT: ret 13 %and = and <1 x i8> %C, %B 14 %neg = xor <1 x i8> %C, <i8 -1> 15 %and1 = and <1 x i8> %neg, %A 16 %or = or <1 x i8> %and, %and1 17 ret <1 x i8> %or 18} 19 20; 16-bit vectors tests 21 22define <1 x i16> @test_bit_v1i16(<1 x i16> %A, <1 x i16> %B, <1 x i16> %C) { 23; CHECK-LABEL: test_bit_v1i16: 24; CHECK: // %bb.0: 25; CHECK-NEXT: bit v0.8b, v1.8b, v2.8b 26; CHECK-NEXT: ret 27 %and = and <1 x i16> %C, %B 28 %neg = xor <1 x i16> %C, <i16 -1> 29 %and1 = and <1 x i16> %neg, %A 30 %or = or <1 x i16> %and, %and1 31 ret <1 x i16> %or 32} 33 34; 32-bit vectors tests 35 36define <1 x i32> @test_bit_v1i32(<1 x i32> %A, <1 x i32> %B, <1 x i32> %C) { 37; CHECK-LABEL: test_bit_v1i32: 38; CHECK: // %bb.0: 39; CHECK-NEXT: bit v0.8b, v1.8b, v2.8b 40; CHECK-NEXT: ret 41 %and = and <1 x i32> %C, %B 42 %neg = xor <1 x i32> %C, <i32 -1> 43 %and1 = and <1 x i32> %neg, %A 44 %or = or <1 x i32> %and, %and1 45 ret <1 x i32> %or 46} 47 48; 64-bit vectors tests 49 50define <1 x i64> @test_bit_v1i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C) { 51; CHECK-LABEL: test_bit_v1i64: 52; CHECK: // %bb.0: 53; CHECK-NEXT: bit v0.8b, v1.8b, v2.8b 54; CHECK-NEXT: ret 55 %and = and <1 x i64> %C, %B 56 %neg = xor <1 x i64> %C, <i64 -1> 57 %and1 = and <1 x i64> %neg, %A 58 %or = or <1 x i64> %and, %and1 59 ret <1 x i64> %or 60} 61 62define <2 x i32> @test_bit_v2i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C) { 63; CHECK-LABEL: test_bit_v2i32: 64; CHECK: // %bb.0: 65; CHECK-NEXT: bit v0.8b, v1.8b, v2.8b 66; CHECK-NEXT: ret 67 %and = and <2 x i32> %C, %B 68 %neg = xor <2 x i32> %C, <i32 -1, i32 -1> 69 %and1 = and <2 x i32> %neg, %A 70 %or = or <2 x i32> %and, %and1 71 ret <2 x i32> %or 72} 73 74define <4 x i16> @test_bit_v4i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C) { 75; CHECK-LABEL: test_bit_v4i16: 76; CHECK: // %bb.0: 77; CHECK-NEXT: bit v0.8b, v1.8b, v2.8b 78; CHECK-NEXT: ret 79 %and = and <4 x i16> %C, %B 80 %neg = xor <4 x i16> %C, <i16 -1, i16 -1, i16 -1, i16 -1> 81 %and1 = and <4 x i16> %neg, %A 82 %or = or <4 x i16> %and, %and1 83 ret <4 x i16> %or 84} 85 86define <8 x i8> @test_bit_v8i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C) { 87; CHECK-LABEL: test_bit_v8i8: 88; CHECK: // %bb.0: 89; CHECK-NEXT: bit v0.8b, v1.8b, v2.8b 90; CHECK-NEXT: ret 91 %and = and <8 x i8> %C, %B 92 %neg = xor <8 x i8> %C, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> 93 %and1 = and <8 x i8> %neg, %A 94 %or = or <8 x i8> %and, %and1 95 ret <8 x i8> %or 96} 97 98; 128-bit vectors tests 99 100define <2 x i64> @test_bit_v2i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C) { 101; CHECK-LABEL: test_bit_v2i64: 102; CHECK: // %bb.0: 103; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b 104; CHECK-NEXT: ret 105 %and = and <2 x i64> %C, %B 106 %neg = xor <2 x i64> %C, <i64 -1, i64 -1> 107 %and1 = and <2 x i64> %neg, %A 108 %or = or <2 x i64> %and, %and1 109 ret <2 x i64> %or 110} 111 112define <4 x i32> @test_bit_v4i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) { 113; CHECK-LABEL: test_bit_v4i32: 114; CHECK: // %bb.0: 115; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b 116; CHECK-NEXT: ret 117 %and = and <4 x i32> %C, %B 118 %neg = xor <4 x i32> %C, <i32 -1, i32 -1, i32 -1, i32 -1> 119 %and1 = and <4 x i32> %neg, %A 120 %or = or <4 x i32> %and, %and1 121 ret <4 x i32> %or 122} 123 124define <8 x i16> @test_bit_v8i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C) { 125; CHECK-LABEL: test_bit_v8i16: 126; CHECK: // %bb.0: 127; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b 128; CHECK-NEXT: ret 129 %and = and <8 x i16> %C, %B 130 %neg = xor <8 x i16> %C, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 131 %and1 = and <8 x i16> %neg, %A 132 %or = or <8 x i16> %and, %and1 133 ret <8 x i16> %or 134} 135 136define <16 x i8> @test_bit_v16i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C) { 137; CHECK-LABEL: test_bit_v16i8: 138; CHECK: // %bb.0: 139; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b 140; CHECK-NEXT: ret 141 %and = and <16 x i8> %C, %B 142 %neg = xor <16 x i8> %C, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> 143 %and1 = and <16 x i8> %neg, %A 144 %or = or <16 x i8> %and, %and1 145 ret <16 x i8> %or 146} 147