1; RUN: llc -mtriple=aarch64-none-linux-gnu < %s -mattr=+neon | FileCheck %s 2 3; SDIVREM/UDIVREM DAG nodes are generated but expanded when lowering and 4; should not generate select error. 5define <2 x i32> @test_udivrem(<2 x i32> %x, < 2 x i32> %y, < 2 x i32>* %z) { 6; CHECK-LABEL: test_udivrem 7; CHECK-DAG: udivrem 8; CHECK-NOT: LLVM ERROR: Cannot select 9 %div = udiv <2 x i32> %x, %y 10 store <2 x i32> %div, <2 x i32>* %z 11 %1 = urem <2 x i32> %x, %y 12 ret <2 x i32> %1 13} 14 15define <4 x i32> @test_sdivrem(<4 x i32> %x, <4 x i32>* %y) { 16; CHECK-LABEL: test_sdivrem 17; CHECK-DAG: sdivrem 18 %div = sdiv <4 x i32> %x, < i32 20, i32 20, i32 20, i32 20 > 19 store <4 x i32> %div, <4 x i32>* %y 20 %1 = srem <4 x i32> %x, < i32 20, i32 20, i32 20, i32 20 > 21 ret <4 x i32> %1 22} 23