1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s 3 4define void @test_load_store(half* %in, half* %out) { 5; CHECK-LABEL: test_load_store: 6; CHECK: // %bb.0: 7; CHECK-NEXT: ldr h0, [x0] 8; CHECK-NEXT: str h0, [x1] 9; CHECK-NEXT: ret 10 %val = load half, half* %in 11 store half %val, half* %out 12 ret void 13} 14 15define i16 @test_bitcast_from_half(half* %addr) { 16; CHECK-LABEL: test_bitcast_from_half: 17; CHECK: // %bb.0: 18; CHECK-NEXT: ldrh w0, [x0] 19; CHECK-NEXT: ret 20 %val = load half, half* %addr 21 %val_int = bitcast half %val to i16 22 ret i16 %val_int 23} 24 25define i16 @test_reg_bitcast_from_half(half %in) { 26; CHECK-LABEL: test_reg_bitcast_from_half: 27; CHECK: // %bb.0: 28; CHECK-NEXT: // kill: def $h0 killed $h0 def $s0 29; CHECK-NEXT: fmov w0, s0 30; CHECK-NEXT: ret 31 %val = bitcast half %in to i16 32 ret i16 %val 33} 34 35define void @test_bitcast_to_half(half* %addr, i16 %in) { 36; CHECK-LABEL: test_bitcast_to_half: 37; CHECK: // %bb.0: 38; CHECK-NEXT: strh w1, [x0] 39; CHECK-NEXT: ret 40 %val_fp = bitcast i16 %in to half 41 store half %val_fp, half* %addr 42 ret void 43} 44 45define half @test_reg_bitcast_to_half(i16 %in) { 46; CHECK-LABEL: test_reg_bitcast_to_half: 47; CHECK: // %bb.0: 48; CHECK-NEXT: fmov s0, w0 49; CHECK-NEXT: // kill: def $h0 killed $h0 killed $s0 50; CHECK-NEXT: ret 51 %val = bitcast i16 %in to half 52 ret half %val 53} 54 55define float @test_extend32(half* %addr) { 56; CHECK-LABEL: test_extend32: 57; CHECK: // %bb.0: 58; CHECK-NEXT: ldr h0, [x0] 59; CHECK-NEXT: fcvt s0, h0 60; CHECK-NEXT: ret 61 %val16 = load half, half* %addr 62 %val32 = fpext half %val16 to float 63 ret float %val32 64} 65 66define double @test_extend64(half* %addr) { 67; CHECK-LABEL: test_extend64: 68; CHECK: // %bb.0: 69; CHECK-NEXT: ldr h0, [x0] 70; CHECK-NEXT: fcvt d0, h0 71; CHECK-NEXT: ret 72 %val16 = load half, half* %addr 73 %val32 = fpext half %val16 to double 74 ret double %val32 75} 76 77define void @test_trunc32(float %in, half* %addr) { 78; CHECK-LABEL: test_trunc32: 79; CHECK: // %bb.0: 80; CHECK-NEXT: fcvt h0, s0 81; CHECK-NEXT: str h0, [x0] 82; CHECK-NEXT: ret 83 %val16 = fptrunc float %in to half 84 store half %val16, half* %addr 85 ret void 86} 87 88define void @test_trunc64(double %in, half* %addr) { 89; CHECK-LABEL: test_trunc64: 90; CHECK: // %bb.0: 91; CHECK-NEXT: fcvt h0, d0 92; CHECK-NEXT: str h0, [x0] 93; CHECK-NEXT: ret 94 %val16 = fptrunc double %in to half 95 store half %val16, half* %addr 96 ret void 97} 98 99define i16 @test_fccmp(i1 %a, i16 %in) { 100; CHECK-LABEL: test_fccmp: 101; CHECK: // %bb.0: 102; CHECK-NEXT: mov w8, #24576 103; CHECK-NEXT: fmov s0, w1 104; CHECK-NEXT: movk w8, #15974, lsl #16 105; CHECK-NEXT: mov w9, #16384 106; CHECK-NEXT: fcvt s0, h0 107; CHECK-NEXT: movk w9, #15428, lsl #16 108; CHECK-NEXT: fmov s1, w8 109; CHECK-NEXT: fcmp s0, s1 110; CHECK-NEXT: fmov s1, w9 111; CHECK-NEXT: cset w8, pl 112; CHECK-NEXT: fccmp s0, s1, #8, pl 113; CHECK-NEXT: mov w9, #4 114; CHECK-NEXT: csinc w9, w9, wzr, mi 115; CHECK-NEXT: add w0, w8, w9 116; CHECK-NEXT: ret 117 %f16 = bitcast i16 %in to half 118 %cmp0 = fcmp ogt half 0xH3333, %f16 119 %cmp1 = fcmp ogt half 0xH2222, %f16 120 %x = select i1 %cmp0, i16 0, i16 1 121 %or = or i1 %cmp1, %cmp0 122 %y = select i1 %or, i16 4, i16 1 123 %r = add i16 %x, %y 124 ret i16 %r 125} 126