1; RUN: llc < %s -mtriple=aarch64 -mattr=+neon | FileCheck %s 2 3; CHECK-LABEL: testmsws: 4; CHECK: fcvtas x0, s0 5; CHECK: ret 6define i32 @testmsws(float %x) { 7entry: 8 %0 = tail call i64 @llvm.llround.f32(float %x) 9 %conv = trunc i64 %0 to i32 10 ret i32 %conv 11} 12 13; CHECK-LABEL: testmsxs: 14; CHECK: fcvtas x0, s0 15; CHECK-NEXT: ret 16define i64 @testmsxs(float %x) { 17entry: 18 %0 = tail call i64 @llvm.llround.f32(float %x) 19 ret i64 %0 20} 21 22; CHECK-LABEL: testmswd: 23; CHECK: fcvtas x0, d0 24; CHECK: ret 25define i32 @testmswd(double %x) { 26entry: 27 %0 = tail call i64 @llvm.llround.f64(double %x) 28 %conv = trunc i64 %0 to i32 29 ret i32 %conv 30} 31 32; CHECK-LABEL: testmsxd: 33; CHECK: fcvtas x0, d0 34; CHECK-NEXT: ret 35define i64 @testmsxd(double %x) { 36entry: 37 %0 = tail call i64 @llvm.llround.f64(double %x) 38 ret i64 %0 39} 40 41; CHECK-LABEL: testmswl: 42; CHECK: bl llroundl 43define i32 @testmswl(fp128 %x) { 44entry: 45 %0 = tail call i64 @llvm.llround.f128(fp128 %x) 46 %conv = trunc i64 %0 to i32 47 ret i32 %conv 48} 49 50; CHECK-LABEL: testmsll: 51; CHECK: b llroundl 52define i64 @testmsll(fp128 %x) { 53entry: 54 %0 = tail call i64 @llvm.llround.f128(fp128 %x) 55 ret i64 %0 56} 57 58declare i64 @llvm.llround.f32(float) nounwind readnone 59declare i64 @llvm.llround.f64(double) nounwind readnone 60declare i64 @llvm.llround.f128(fp128) nounwind readnone 61