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1; RUN: llc < %s -mtriple=aarch64-windows -mattr=+neon | FileCheck %s
2
3; CHECK-LABEL: testmsxs:
4; CHECK:       fcvtas  w8, s0
5; CHECK-NEXT:  sxtw    x0, w8
6; CHECK-NEXT:  ret
7define i64 @testmsxs(float %x) {
8entry:
9  %0 = tail call i32 @llvm.lround.i32.f32(float %x)
10  %conv = sext i32 %0 to i64
11  ret i64 %conv
12}
13
14; CHECK-LABEL: testmsws:
15; CHECK:       fcvtas  w0, s0
16; CHECK-NEXT:  ret
17define i32 @testmsws(float %x) {
18entry:
19  %0 = tail call i32 @llvm.lround.i32.f32(float %x)
20  ret i32 %0
21}
22
23; CHECK-LABEL: testmsxd:
24; CHECK:       fcvtas  w8, d0
25; CHECK-NEXT:  sxtw    x0, w8
26; CHECK-NEXT:  ret
27define i64 @testmsxd(double %x) {
28entry:
29  %0 = tail call i32 @llvm.lround.i32.f64(double %x)
30  %conv = sext i32 %0 to i64
31  ret i64 %conv
32}
33
34; CHECK-LABEL: testmswd:
35; CHECK:       fcvtas  w0, d0
36; CHECK-NEXT:  ret
37define i32 @testmswd(double %x) {
38entry:
39  %0 = tail call i32 @llvm.lround.i32.f64(double %x)
40  ret i32 %0
41}
42
43declare i32 @llvm.lround.i32.f32(float) nounwind readnone
44declare i32 @llvm.lround.i32.f64(double) nounwind readnone
45