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1; RUN: llc -mtriple aarch64-none-linux-gnu -mattr=+fp16fml < %s | FileCheck %s
2
3declare <2 x float> @llvm.aarch64.neon.fmlal.v2f32.v4f16(<2 x float>, <4 x half>, <4 x half>)
4declare <2 x float> @llvm.aarch64.neon.fmlsl.v2f32.v4f16(<2 x float>, <4 x half>, <4 x half>)
5declare <2 x float> @llvm.aarch64.neon.fmlal2.v2f32.v4f16(<2 x float>, <4 x half>, <4 x half>)
6declare <2 x float> @llvm.aarch64.neon.fmlsl2.v2f32.v4f16(<2 x float>, <4 x half>, <4 x half>)
7declare <4 x float> @llvm.aarch64.neon.fmlal.v4f32.v8f16(<4 x float>, <8 x half>, <8 x half>)
8declare <4 x float> @llvm.aarch64.neon.fmlsl.v4f32.v8f16(<4 x float>, <8 x half>, <8 x half>)
9declare <4 x float> @llvm.aarch64.neon.fmlal2.v4f32.v8f16(<4 x float>, <8 x half>, <8 x half>)
10declare <4 x float> @llvm.aarch64.neon.fmlsl2.v4f32.v8f16(<4 x float>, <8 x half>, <8 x half>)
11
12define <2 x float> @test_vfmlal_low_u32(<2 x float> %a, <4 x half> %b, <4 x half> %c) #0 {
13entry:
14; CHECK-LABEL: test_vfmlal_low_u32:
15; CHECK: fmlal   v0.2s, v1.2h, v2.2h
16  %vfmlal_low2.i = call <2 x float> @llvm.aarch64.neon.fmlal.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> %c) #2
17  ret <2 x float> %vfmlal_low2.i
18}
19
20define <2 x float> @test_vfmlsl_low_u32(<2 x float> %a, <4 x half> %b, <4 x half> %c) #0 {
21entry:
22; CHECK-LABEL: test_vfmlsl_low_u32:
23; CHECK: fmlsl   v0.2s, v1.2h, v2.2h
24  %vfmlsl_low2.i = call <2 x float> @llvm.aarch64.neon.fmlsl.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> %c) #2
25  ret <2 x float> %vfmlsl_low2.i
26}
27
28define <2 x float> @test_vfmlal_high_u32(<2 x float> %a, <4 x half> %b, <4 x half> %c) #0 {
29entry:
30; CHECK-LABEL: test_vfmlal_high_u32:
31; CHECK: fmlal2   v0.2s, v1.2h, v2.2h
32  %vfmlal_high2.i = call <2 x float> @llvm.aarch64.neon.fmlal2.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> %c) #2
33  ret <2 x float> %vfmlal_high2.i
34}
35
36define <2 x float> @test_vfmlsl_high_u32(<2 x float> %a, <4 x half> %b, <4 x half> %c) #0 {
37entry:
38; CHECK-LABEL: test_vfmlsl_high_u32:
39; CHECK: fmlsl2   v0.2s, v1.2h, v2.2h
40  %vfmlsl_high2.i = call <2 x float> @llvm.aarch64.neon.fmlsl2.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> %c) #2
41  ret <2 x float> %vfmlsl_high2.i
42}
43
44define <4 x float> @test_vfmlalq_low_u32(<4 x float> %a, <8 x half> %b, <8 x half> %c) #0 {
45entry:
46; CHECK-LABEL: test_vfmlalq_low_u32:
47; CHECK: fmlal   v0.4s, v1.4h, v2.4h
48  %vfmlalq_low4.i = call <4 x float> @llvm.aarch64.neon.fmlal.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> %c) #2
49  ret <4 x float> %vfmlalq_low4.i
50}
51
52define <4 x float> @test_vfmlslq_low_u32(<4 x float> %a, <8 x half> %b, <8 x half> %c) #0 {
53entry:
54; CHECK-LABEL: test_vfmlslq_low_u32:
55; CHECK: fmlsl   v0.4s, v1.4h, v2.4h
56  %vfmlslq_low4.i = call <4 x float> @llvm.aarch64.neon.fmlsl.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> %c) #2
57  ret <4 x float> %vfmlslq_low4.i
58}
59
60define <4 x float> @test_vfmlalq_high_u32(<4 x float> %a, <8 x half> %b, <8 x half> %c) #0 {
61entry:
62; CHECK-LABEL: test_vfmlalq_high_u32:
63; CHECK: fmlal2   v0.4s, v1.4h, v2.4h
64  %vfmlalq_high4.i = call <4 x float> @llvm.aarch64.neon.fmlal2.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> %c) #2
65  ret <4 x float> %vfmlalq_high4.i
66}
67
68define <4 x float> @test_vfmlslq_high_u32(<4 x float> %a, <8 x half> %b, <8 x half> %c) #0 {
69entry:
70; CHECK-LABEL: test_vfmlslq_high_u32:
71; CHECK: fmlsl2   v0.4s, v1.4h, v2.4h
72  %vfmlslq_high4.i = call <4 x float> @llvm.aarch64.neon.fmlsl2.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> %c) #2
73  ret <4 x float> %vfmlslq_high4.i
74}
75