1; RUN: llc < %s -mtriple aarch64-apple-darwin -asm-verbose=false -disable-post-ra | FileCheck %s 2 3define void @test_stnp_v4i64(<4 x i64>* %p, <4 x i64> %v) #0 { 4; CHECK-LABEL: test_stnp_v4i64: 5; CHECK-NEXT: stnp q0, q1, [x0] 6; CHECK-NEXT: ret 7 store <4 x i64> %v, <4 x i64>* %p, align 1, !nontemporal !0 8 ret void 9} 10 11define void @test_stnp_v4i32(<4 x i32>* %p, <4 x i32> %v) #0 { 12; CHECK-LABEL: test_stnp_v4i32: 13; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 14; CHECK-NEXT: stnp d0, d[[HI]], [x0] 15; CHECK-NEXT: ret 16 store <4 x i32> %v, <4 x i32>* %p, align 1, !nontemporal !0 17 ret void 18} 19 20define void @test_stnp_v8i16(<8 x i16>* %p, <8 x i16> %v) #0 { 21; CHECK-LABEL: test_stnp_v8i16: 22; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 23; CHECK-NEXT: stnp d0, d[[HI]], [x0] 24; CHECK-NEXT: ret 25 store <8 x i16> %v, <8 x i16>* %p, align 1, !nontemporal !0 26 ret void 27} 28 29define void @test_stnp_v16i8(<16 x i8>* %p, <16 x i8> %v) #0 { 30; CHECK-LABEL: test_stnp_v16i8: 31; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 32; CHECK-NEXT: stnp d0, d[[HI]], [x0] 33; CHECK-NEXT: ret 34 store <16 x i8> %v, <16 x i8>* %p, align 1, !nontemporal !0 35 ret void 36} 37 38define void @test_stnp_v2i32(<2 x i32>* %p, <2 x i32> %v) #0 { 39; CHECK-LABEL: test_stnp_v2i32: 40; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 41; CHECK-NEXT: stnp s0, s[[HI]], [x0] 42; CHECK-NEXT: ret 43 store <2 x i32> %v, <2 x i32>* %p, align 1, !nontemporal !0 44 ret void 45} 46 47define void @test_stnp_v4i16(<4 x i16>* %p, <4 x i16> %v) #0 { 48; CHECK-LABEL: test_stnp_v4i16: 49; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 50; CHECK-NEXT: stnp s0, s[[HI]], [x0] 51; CHECK-NEXT: ret 52 store <4 x i16> %v, <4 x i16>* %p, align 1, !nontemporal !0 53 ret void 54} 55 56define void @test_stnp_v8i8(<8 x i8>* %p, <8 x i8> %v) #0 { 57; CHECK-LABEL: test_stnp_v8i8: 58; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 59; CHECK-NEXT: stnp s0, s[[HI]], [x0] 60; CHECK-NEXT: ret 61 store <8 x i8> %v, <8 x i8>* %p, align 1, !nontemporal !0 62 ret void 63} 64 65define void @test_stnp_v2f64(<2 x double>* %p, <2 x double> %v) #0 { 66; CHECK-LABEL: test_stnp_v2f64: 67; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 68; CHECK-NEXT: stnp d0, d[[HI]], [x0] 69; CHECK-NEXT: ret 70 store <2 x double> %v, <2 x double>* %p, align 1, !nontemporal !0 71 ret void 72} 73 74define void @test_stnp_v4f32(<4 x float>* %p, <4 x float> %v) #0 { 75; CHECK-LABEL: test_stnp_v4f32: 76; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 77; CHECK-NEXT: stnp d0, d[[HI]], [x0] 78; CHECK-NEXT: ret 79 store <4 x float> %v, <4 x float>* %p, align 1, !nontemporal !0 80 ret void 81} 82 83define void @test_stnp_v2f32(<2 x float>* %p, <2 x float> %v) #0 { 84; CHECK-LABEL: test_stnp_v2f32: 85; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 86; CHECK-NEXT: stnp s0, s[[HI]], [x0] 87; CHECK-NEXT: ret 88 store <2 x float> %v, <2 x float>* %p, align 1, !nontemporal !0 89 ret void 90} 91 92define void @test_stnp_v1f64(<1 x double>* %p, <1 x double> %v) #0 { 93; CHECK-LABEL: test_stnp_v1f64: 94; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 95; CHECK-NEXT: stnp s0, s[[HI]], [x0] 96; CHECK-NEXT: ret 97 store <1 x double> %v, <1 x double>* %p, align 1, !nontemporal !0 98 ret void 99} 100 101define void @test_stnp_v1i64(<1 x i64>* %p, <1 x i64> %v) #0 { 102; CHECK-LABEL: test_stnp_v1i64: 103; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 104; CHECK-NEXT: stnp s0, s[[HI]], [x0] 105; CHECK-NEXT: ret 106 store <1 x i64> %v, <1 x i64>* %p, align 1, !nontemporal !0 107 ret void 108} 109 110define void @test_stnp_i64(i64* %p, i64 %v) #0 { 111; CHECK-LABEL: test_stnp_i64: 112; CHECK-NEXT: lsr x[[HI:[0-9]+]], x1, #32 113; CHECK-NEXT: stnp w1, w[[HI]], [x0] 114; CHECK-NEXT: ret 115 store i64 %v, i64* %p, align 1, !nontemporal !0 116 ret void 117} 118 119 120define void @test_stnp_v2f64_offset(<2 x double>* %p, <2 x double> %v) #0 { 121; CHECK-LABEL: test_stnp_v2f64_offset: 122; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 123; CHECK-NEXT: stnp d0, d[[HI]], [x0, #16] 124; CHECK-NEXT: ret 125 %tmp0 = getelementptr <2 x double>, <2 x double>* %p, i32 1 126 store <2 x double> %v, <2 x double>* %tmp0, align 1, !nontemporal !0 127 ret void 128} 129 130define void @test_stnp_v2f64_offset_neg(<2 x double>* %p, <2 x double> %v) #0 { 131; CHECK-LABEL: test_stnp_v2f64_offset_neg: 132; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 133; CHECK-NEXT: stnp d0, d[[HI]], [x0, #-16] 134; CHECK-NEXT: ret 135 %tmp0 = getelementptr <2 x double>, <2 x double>* %p, i32 -1 136 store <2 x double> %v, <2 x double>* %tmp0, align 1, !nontemporal !0 137 ret void 138} 139 140define void @test_stnp_v2f32_offset(<2 x float>* %p, <2 x float> %v) #0 { 141; CHECK-LABEL: test_stnp_v2f32_offset: 142; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 143; CHECK-NEXT: stnp s0, s[[HI]], [x0, #8] 144; CHECK-NEXT: ret 145 %tmp0 = getelementptr <2 x float>, <2 x float>* %p, i32 1 146 store <2 x float> %v, <2 x float>* %tmp0, align 1, !nontemporal !0 147 ret void 148} 149 150define void @test_stnp_v2f32_offset_neg(<2 x float>* %p, <2 x float> %v) #0 { 151; CHECK-LABEL: test_stnp_v2f32_offset_neg: 152; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 153; CHECK-NEXT: stnp s0, s[[HI]], [x0, #-8] 154; CHECK-NEXT: ret 155 %tmp0 = getelementptr <2 x float>, <2 x float>* %p, i32 -1 156 store <2 x float> %v, <2 x float>* %tmp0, align 1, !nontemporal !0 157 ret void 158} 159 160define void @test_stnp_i64_offset(i64* %p, i64 %v) #0 { 161; CHECK-LABEL: test_stnp_i64_offset: 162; CHECK-NEXT: lsr x[[HI:[0-9]+]], x1, #32 163; CHECK-NEXT: stnp w1, w[[HI]], [x0, #8] 164; CHECK-NEXT: ret 165 %tmp0 = getelementptr i64, i64* %p, i32 1 166 store i64 %v, i64* %tmp0, align 1, !nontemporal !0 167 ret void 168} 169 170define void @test_stnp_i64_offset_neg(i64* %p, i64 %v) #0 { 171; CHECK-LABEL: test_stnp_i64_offset_neg: 172; CHECK-NEXT: lsr x[[HI:[0-9]+]], x1, #32 173; CHECK-NEXT: stnp w1, w[[HI]], [x0, #-8] 174; CHECK-NEXT: ret 175 %tmp0 = getelementptr i64, i64* %p, i32 -1 176 store i64 %v, i64* %tmp0, align 1, !nontemporal !0 177 ret void 178} 179 180define void @test_stnp_v4f32_invalid_offset_4(i8* %p, <4 x float> %v) #0 { 181; CHECK-LABEL: test_stnp_v4f32_invalid_offset_4: 182; CHECK-NEXT: add x[[PTR:[0-9]+]], x0, #4 183; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 184; CHECK-NEXT: stnp d0, d[[HI]], [x[[PTR]]] 185; CHECK-NEXT: ret 186 %tmp0 = getelementptr i8, i8* %p, i32 4 187 %tmp1 = bitcast i8* %tmp0 to <4 x float>* 188 store <4 x float> %v, <4 x float>* %tmp1, align 1, !nontemporal !0 189 ret void 190} 191 192define void @test_stnp_v4f32_invalid_offset_neg_4(i8* %p, <4 x float> %v) #0 { 193; CHECK-LABEL: test_stnp_v4f32_invalid_offset_neg_4: 194; CHECK-NEXT: sub x[[PTR:[0-9]+]], x0, #4 195; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 196; CHECK-NEXT: stnp d0, d[[HI]], [x[[PTR]]] 197; CHECK-NEXT: ret 198 %tmp0 = getelementptr i8, i8* %p, i32 -4 199 %tmp1 = bitcast i8* %tmp0 to <4 x float>* 200 store <4 x float> %v, <4 x float>* %tmp1, align 1, !nontemporal !0 201 ret void 202} 203 204define void @test_stnp_v4f32_invalid_offset_512(i8* %p, <4 x float> %v) #0 { 205; CHECK-LABEL: test_stnp_v4f32_invalid_offset_512: 206; CHECK-NEXT: add x[[PTR:[0-9]+]], x0, #512 207; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 208; CHECK-NEXT: stnp d0, d[[HI]], [x[[PTR]]] 209; CHECK-NEXT: ret 210 %tmp0 = getelementptr i8, i8* %p, i32 512 211 %tmp1 = bitcast i8* %tmp0 to <4 x float>* 212 store <4 x float> %v, <4 x float>* %tmp1, align 1, !nontemporal !0 213 ret void 214} 215 216define void @test_stnp_v4f32_offset_504(i8* %p, <4 x float> %v) #0 { 217; CHECK-LABEL: test_stnp_v4f32_offset_504: 218; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 219; CHECK-NEXT: stnp d0, d[[HI]], [x0, #504] 220; CHECK-NEXT: ret 221 %tmp0 = getelementptr i8, i8* %p, i32 504 222 %tmp1 = bitcast i8* %tmp0 to <4 x float>* 223 store <4 x float> %v, <4 x float>* %tmp1, align 1, !nontemporal !0 224 ret void 225} 226 227define void @test_stnp_v4f32_invalid_offset_508(i8* %p, <4 x float> %v) #0 { 228; CHECK-LABEL: test_stnp_v4f32_invalid_offset_508: 229; CHECK-NEXT: add x[[PTR:[0-9]+]], x0, #508 230; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 231; CHECK-NEXT: stnp d0, d[[HI]], [x[[PTR]]] 232; CHECK-NEXT: ret 233 %tmp0 = getelementptr i8, i8* %p, i32 508 234 %tmp1 = bitcast i8* %tmp0 to <4 x float>* 235 store <4 x float> %v, <4 x float>* %tmp1, align 1, !nontemporal !0 236 ret void 237} 238 239define void @test_stnp_v4f32_invalid_offset_neg_520(i8* %p, <4 x float> %v) #0 { 240; CHECK-LABEL: test_stnp_v4f32_invalid_offset_neg_520: 241; CHECK-NEXT: sub x[[PTR:[0-9]+]], x0, #520 242; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 243; CHECK-NEXT: stnp d0, d[[HI]], [x[[PTR]]] 244; CHECK-NEXT: ret 245 %tmp0 = getelementptr i8, i8* %p, i32 -520 246 %tmp1 = bitcast i8* %tmp0 to <4 x float>* 247 store <4 x float> %v, <4 x float>* %tmp1, align 1, !nontemporal !0 248 ret void 249} 250 251define void @test_stnp_v4f32_offset_neg_512(i8* %p, <4 x float> %v) #0 { 252; CHECK-LABEL: test_stnp_v4f32_offset_neg_512: 253; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 254; CHECK-NEXT: stnp d0, d[[HI]], [x0, #-512] 255; CHECK-NEXT: ret 256 %tmp0 = getelementptr i8, i8* %p, i32 -512 257 %tmp1 = bitcast i8* %tmp0 to <4 x float>* 258 store <4 x float> %v, <4 x float>* %tmp1, align 1, !nontemporal !0 259 ret void 260} 261 262 263define void @test_stnp_v2f32_invalid_offset_256(i8* %p, <2 x float> %v) #0 { 264; CHECK-LABEL: test_stnp_v2f32_invalid_offset_256: 265; CHECK-NEXT: add x[[PTR:[0-9]+]], x0, #256 266; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 267; CHECK-NEXT: stnp s0, s[[HI]], [x[[PTR]]] 268; CHECK-NEXT: ret 269 %tmp0 = getelementptr i8, i8* %p, i32 256 270 %tmp1 = bitcast i8* %tmp0 to <2 x float>* 271 store <2 x float> %v, <2 x float>* %tmp1, align 1, !nontemporal !0 272 ret void 273} 274 275define void @test_stnp_v2f32_offset_252(i8* %p, <2 x float> %v) #0 { 276; CHECK-LABEL: test_stnp_v2f32_offset_252: 277; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 278; CHECK-NEXT: stnp s0, s[[HI]], [x0, #252] 279; CHECK-NEXT: ret 280 %tmp0 = getelementptr i8, i8* %p, i32 252 281 %tmp1 = bitcast i8* %tmp0 to <2 x float>* 282 store <2 x float> %v, <2 x float>* %tmp1, align 1, !nontemporal !0 283 ret void 284} 285 286define void @test_stnp_v2f32_invalid_offset_neg_260(i8* %p, <2 x float> %v) #0 { 287; CHECK-LABEL: test_stnp_v2f32_invalid_offset_neg_260: 288; CHECK-NEXT: sub x[[PTR:[0-9]+]], x0, #260 289; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 290; CHECK-NEXT: stnp s0, s[[HI]], [x[[PTR]]] 291; CHECK-NEXT: ret 292 %tmp0 = getelementptr i8, i8* %p, i32 -260 293 %tmp1 = bitcast i8* %tmp0 to <2 x float>* 294 store <2 x float> %v, <2 x float>* %tmp1, align 1, !nontemporal !0 295 ret void 296} 297 298define void @test_stnp_v2f32_offset_neg_256(i8* %p, <2 x float> %v) #0 { 299; CHECK-LABEL: test_stnp_v2f32_offset_neg_256: 300; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 301; CHECK-NEXT: stnp s0, s[[HI]], [x0, #-256] 302; CHECK-NEXT: ret 303 %tmp0 = getelementptr i8, i8* %p, i32 -256 304 %tmp1 = bitcast i8* %tmp0 to <2 x float>* 305 store <2 x float> %v, <2 x float>* %tmp1, align 1, !nontemporal !0 306 ret void 307} 308 309declare void @dummy(<4 x float>*) 310 311define void @test_stnp_v4f32_offset_alloca(<4 x float> %v) #0 { 312; CHECK-LABEL: test_stnp_v4f32_offset_alloca: 313; CHECK: stnp d0, d{{.*}}, [sp] 314; CHECK-NEXT: mov x0, sp 315; CHECK-NEXT: bl _dummy 316 %tmp0 = alloca <4 x float> 317 store <4 x float> %v, <4 x float>* %tmp0, align 1, !nontemporal !0 318 call void @dummy(<4 x float>* %tmp0) 319 ret void 320} 321 322define void @test_stnp_v4f32_offset_alloca_2(<4 x float> %v) #0 { 323; CHECK-LABEL: test_stnp_v4f32_offset_alloca_2: 324; CHECK: stnp d0, d{{.*}}, [sp, #16] 325; CHECK-NEXT: mov x0, sp 326; CHECK-NEXT: bl _dummy 327 %tmp0 = alloca <4 x float>, i32 2 328 %tmp1 = getelementptr <4 x float>, <4 x float>* %tmp0, i32 1 329 store <4 x float> %v, <4 x float>* %tmp1, align 1, !nontemporal !0 330 call void @dummy(<4 x float>* %tmp0) 331 ret void 332} 333 334define void @test_stnp_v32i8(<32 x i8> %v, <32 x i8>* %ptr) { 335; CHECK-LABEL: _test_stnp_v32i8: 336; CHECK-NEXT: .cfi_startproc 337; CHECK-NEXT: stnp q0, q1, [x0] 338; CHECK-NEXT: ret 339 340entry: 341 store <32 x i8> %v, <32 x i8>* %ptr, align 4, !nontemporal !0 342 ret void 343} 344 345define void @test_stnp_v32i16(<32 x i16> %v, <32 x i16>* %ptr) { 346; CHECK-LABEL: _test_stnp_v32i16: 347; CHECK-NEXT: .cfi_startproc 348; CHECK-NEXT: stnp q2, q3, [x0, #32] 349; CHECK-NEXT: stnp q0, q1, [x0] 350; CHECK-NEXT: ret 351 352entry: 353 store <32 x i16> %v, <32 x i16>* %ptr, align 4, !nontemporal !0 354 ret void 355} 356 357define void @test_stnp_v32f16(<32 x half> %v, <32 x half>* %ptr) { 358; CHECK-LABEL: _test_stnp_v32f16: 359; CHECK-NEXT: .cfi_startproc 360; CHECK-NEXT: stnp q2, q3, [x0, #32] 361; CHECK-NEXT: stnp q0, q1, [x0] 362; CHECK-NEXT: ret 363 364entry: 365 store <32 x half> %v, <32 x half>* %ptr, align 4, !nontemporal !0 366 ret void 367} 368 369define void @test_stnp_v16i32(<16 x i32> %v, <16 x i32>* %ptr) { 370; CHECK-LABEL: _test_stnp_v16i32: 371; CHECK-NEXT: .cfi_startproc 372; CHECK-NEXT: stnp q2, q3, [x0, #32] 373; CHECK-NEXT: stnp q0, q1, [x0] 374; CHECK-NEXT: ret 375 376entry: 377 store <16 x i32> %v, <16 x i32>* %ptr, align 4, !nontemporal !0 378 ret void 379} 380 381define void @test_stnp_v16f32(<16 x float> %v, <16 x float>* %ptr) { 382; CHECK-LABEL: _test_stnp_v16f32: 383; CHECK-NEXT: .cfi_startproc 384; CHECK-NEXT: stnp q2, q3, [x0, #32] 385; CHECK-NEXT: stnp q0, q1, [x0] 386; CHECK-NEXT: ret 387 388entry: 389 store <16 x float> %v, <16 x float>* %ptr, align 4, !nontemporal !0 390 ret void 391} 392 393define void @test_stnp_v17f32(<17 x float> %v, <17 x float>* %ptr) { 394; CHECK-LABEL: _test_stnp_v17f32: 395; CHECK-NEXT: .cfi_startproc 396; CHECK-NEXT: ldr s16, [sp, #16] 397; CHECK-NEXT: mov.s v0[1], v1[0] 398; CHECK-NEXT: mov.s v4[1], v5[0] 399; CHECK-NEXT: ldr s1, [sp] 400; CHECK-NEXT: add x8, sp, #20 401; CHECK-NEXT: ld1.s { v16 }[1], [x8] 402; CHECK-NEXT: add x8, sp, #4 403; CHECK-NEXT: ld1.s { v1 }[1], [x8] 404; CHECK-NEXT: add x8, sp, #24 405; CHECK-NEXT: ld1.s { v16 }[2], [x8] 406; CHECK-NEXT: add x8, sp, #8 407; CHECK-NEXT: ld1.s { v1 }[2], [x8] 408; CHECK-NEXT: add x8, sp, #28 409; CHECK-NEXT: ld1.s { v16 }[3], [x8] 410; CHECK-NEXT: add x8, sp, #12 411; CHECK-NEXT: mov.s v0[2], v2[0] 412; CHECK-NEXT: ldr s2, [sp, #32] 413; CHECK-NEXT: mov.s v4[2], v6[0] 414; CHECK-NEXT: mov.s v0[3], v3[0] 415; CHECK-NEXT: mov.s v4[3], v7[0] 416; CHECK-NEXT: mov d3, v4[1] 417; CHECK-NEXT: mov d5, v0[1] 418; CHECK-NEXT: ld1.s { v1 }[3], [x8] 419; CHECK-NEXT: stnp d4, d3, [x0, #16] 420; CHECK-NEXT: stnp d0, d5, [x0] 421; CHECK-NEXT: mov d0, v16[1] 422; CHECK-NEXT: mov d3, v1[1] 423; CHECK-NEXT: stnp d16, d0, [x0, #48] 424; CHECK-NEXT: stnp d1, d3, [x0, #32] 425; CHECK-NEXT: str s2, [x0, #64] 426; CHECK-NEXT: ret 427 428entry: 429 store <17 x float> %v, <17 x float>* %ptr, align 4, !nontemporal !0 430 ret void 431} 432define void @test_stnp_v16i32_invalid_offset(<16 x i32> %v, <16 x i32>* %ptr) { 433; CHECK-LABEL: _test_stnp_v16i32_invalid_offset: 434; CHECK-NEXT: .cfi_startproc 435; CHECK-NEXT: mov w8, #32000 436; CHECK-NEXT: mov w9, #32032 437; CHECK-NEXT: add x8, x0, x8 438; CHECK-NEXT: add x9, x0, x9 439; CHECK-NEXT: stnp q2, q3, [x9] 440; CHECK-NEXT: stnp q0, q1, [x8] 441; CHECK-NEXT: ret 442 443entry: 444 %gep = getelementptr <16 x i32>, <16 x i32>* %ptr, i32 500 445 store <16 x i32> %v, <16 x i32>* %gep, align 4, !nontemporal !0 446 ret void 447} 448 449define void @test_stnp_v16f64(<16 x double> %v, <16 x double>* %ptr) { 450; CHECK-LABEL: _test_stnp_v16f64: 451; CHECK-NEXT: .cfi_startproc 452; CHECK-NEXT: stnp q6, q7, [x0, #96] 453; CHECK-NEXT: stnp q4, q5, [x0, #64] 454; CHECK-NEXT: stnp q2, q3, [x0, #32] 455; CHECK-NEXT: stnp q0, q1, [x0] 456; CHECK-NEXT: ret 457 458entry: 459 store <16 x double> %v, <16 x double>* %ptr, align 4, !nontemporal !0 460 ret void 461} 462 463define void @test_stnp_v16i64(<16 x i64> %v, <16 x i64>* %ptr) { 464; CHECK-LABEL: _test_stnp_v16i64: 465; CHECK-NEXT: .cfi_startproc 466; CHECK-NEXT: stnp q6, q7, [x0, #96] 467; CHECK-NEXT: stnp q4, q5, [x0, #64] 468; CHECK-NEXT: stnp q2, q3, [x0, #32] 469; CHECK-NEXT: stnp q0, q1, [x0] 470; CHECK-NEXT: ret 471 472entry: 473 store <16 x i64> %v, <16 x i64>* %ptr, align 4, !nontemporal !0 474 ret void 475} 476 477!0 = !{ i32 1 } 478 479attributes #0 = { nounwind } 480