1; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -mattr=+bf16 < %s | FileCheck %s 2 3; This file checks that unpredicated load/store instructions to locals 4; use the right instructions and offsets. 5 6; Data fills 7 8define void @fill_nxv16i8() { 9; CHECK-LABEL: fill_nxv16i8 10; CHECK-DAG: ld1b { z{{[01]}}.b }, p0/z, [sp] 11; CHECK-DAG: ld1b { z{{[01]}}.b }, p0/z, [sp, #1, mul vl] 12 %local0 = alloca <vscale x 16 x i8> 13 %local1 = alloca <vscale x 16 x i8> 14 load volatile <vscale x 16 x i8>, <vscale x 16 x i8>* %local0 15 load volatile <vscale x 16 x i8>, <vscale x 16 x i8>* %local1 16 ret void 17} 18 19define void @fill_nxv8i8() { 20; CHECK-LABEL: fill_nxv8i8 21; CHECK-DAG: ld1b { z{{[01]}}.h }, p0/z, [sp] 22; CHECK-DAG: ld1b { z{{[01]}}.h }, p0/z, [sp, #1, mul vl] 23 %local0 = alloca <vscale x 8 x i8> 24 %local1 = alloca <vscale x 8 x i8> 25 load volatile <vscale x 8 x i8>, <vscale x 8 x i8>* %local0 26 load volatile <vscale x 8 x i8>, <vscale x 8 x i8>* %local1 27 ret void 28} 29 30define <vscale x 8 x i16> @fill_signed_nxv8i8() { 31; CHECK-LABEL: fill_signed_nxv8i8 32; CHECK-DAG: ld1sb { z{{[01]}}.h }, p0/z, [sp] 33; CHECK-DAG: ld1sb { z{{[01]}}.h }, p0/z, [sp, #1, mul vl] 34 %local0 = alloca <vscale x 8 x i8> 35 %local1 = alloca <vscale x 8 x i8> 36 %a = load volatile <vscale x 8 x i8>, <vscale x 8 x i8>* %local0 37 %a_ext = sext <vscale x 8 x i8> %a to <vscale x 8 x i16> 38 %b = load volatile <vscale x 8 x i8>, <vscale x 8 x i8>* %local1 39 %b_ext = sext <vscale x 8 x i8> %b to <vscale x 8 x i16> 40 %sum = add <vscale x 8 x i16> %a_ext, %b_ext 41 ret <vscale x 8 x i16> %sum 42} 43 44define void @fill_nxv4i8() { 45; CHECK-LABEL: fill_nxv4i8 46; CHECK-DAG: ld1b { z{{[01]}}.s }, p0/z, [sp, #3, mul vl] 47; CHECK-DAG: ld1b { z{{[01]}}.s }, p0/z, [sp, #2, mul vl] 48 %local0 = alloca <vscale x 4 x i8> 49 %local1 = alloca <vscale x 4 x i8> 50 load volatile <vscale x 4 x i8>, <vscale x 4 x i8>* %local0 51 load volatile <vscale x 4 x i8>, <vscale x 4 x i8>* %local1 52 ret void 53} 54 55define <vscale x 4 x i32> @fill_signed_nxv4i8() { 56; CHECK-LABEL: fill_signed_nxv4i8 57; CHECK-DAG: ld1sb { z{{[01]}}.s }, p0/z, [sp, #3, mul vl] 58; CHECK-DAG: ld1sb { z{{[01]}}.s }, p0/z, [sp, #2, mul vl] 59 %local0 = alloca <vscale x 4 x i8> 60 %local1 = alloca <vscale x 4 x i8> 61 %a = load volatile <vscale x 4 x i8>, <vscale x 4 x i8>* %local0 62 %a_ext = sext <vscale x 4 x i8> %a to <vscale x 4 x i32> 63 %b = load volatile <vscale x 4 x i8>, <vscale x 4 x i8>* %local1 64 %b_ext = sext <vscale x 4 x i8> %b to <vscale x 4 x i32> 65 %sum = add <vscale x 4 x i32> %a_ext, %b_ext 66 ret <vscale x 4 x i32> %sum 67} 68 69define void @fill_nxv2i8() { 70; CHECK-LABEL: fill_nxv2i8 71; CHECK-DAG: ld1b { z{{[01]}}.d }, p0/z, [sp, #7, mul vl] 72; CHECK-DAG: ld1b { z{{[01]}}.d }, p0/z, [sp, #6, mul vl] 73 %local0 = alloca <vscale x 2 x i8> 74 %local1 = alloca <vscale x 2 x i8> 75 load volatile <vscale x 2 x i8>, <vscale x 2 x i8>* %local0 76 load volatile <vscale x 2 x i8>, <vscale x 2 x i8>* %local1 77 ret void 78} 79 80define <vscale x 2 x i64> @fill_signed_nxv2i8() { 81; CHECK-LABEL: fill_signed_nxv2i8 82; CHECK-DAG: ld1sb { z{{[01]}}.d }, p0/z, [sp, #7, mul vl] 83; CHECK-DAG: ld1sb { z{{[01]}}.d }, p0/z, [sp, #6, mul vl] 84 %local0 = alloca <vscale x 2 x i8> 85 %local1 = alloca <vscale x 2 x i8> 86 %a = load volatile <vscale x 2 x i8>, <vscale x 2 x i8>* %local0 87 %a_ext = sext <vscale x 2 x i8> %a to <vscale x 2 x i64> 88 %b = load volatile <vscale x 2 x i8>, <vscale x 2 x i8>* %local1 89 %b_ext = sext <vscale x 2 x i8> %b to <vscale x 2 x i64> 90 %sum = add <vscale x 2 x i64> %a_ext, %b_ext 91 ret <vscale x 2 x i64> %sum 92} 93 94define void @fill_nxv8i16() { 95; CHECK-LABEL: fill_nxv8i16 96; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp] 97; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp, #1, mul vl] 98 %local0 = alloca <vscale x 8 x i16> 99 %local1 = alloca <vscale x 8 x i16> 100 load volatile <vscale x 8 x i16>, <vscale x 8 x i16>* %local0 101 load volatile <vscale x 8 x i16>, <vscale x 8 x i16>* %local1 102 ret void 103} 104 105define void @fill_nxv4i16() { 106; CHECK-LABEL: fill_nxv4i16 107; CHECK-DAG: ld1h { z{{[01]}}.s }, p0/z, [sp] 108; CHECK-DAG: ld1h { z{{[01]}}.s }, p0/z, [sp, #1, mul vl] 109 %local0 = alloca <vscale x 4 x i16> 110 %local1 = alloca <vscale x 4 x i16> 111 load volatile <vscale x 4 x i16>, <vscale x 4 x i16>* %local0 112 load volatile <vscale x 4 x i16>, <vscale x 4 x i16>* %local1 113 ret void 114} 115 116define <vscale x 4 x i32> @fill_signed_nxv4i16() { 117; CHECK-LABEL: fill_signed_nxv4i16 118; CHECK-DAG: ld1sh { z{{[01]}}.s }, p0/z, [sp] 119; CHECK-DAG: ld1sh { z{{[01]}}.s }, p0/z, [sp, #1, mul vl] 120 %local0 = alloca <vscale x 4 x i16> 121 %local1 = alloca <vscale x 4 x i16> 122 %a = load volatile <vscale x 4 x i16>, <vscale x 4 x i16>* %local0 123 %a_ext = sext <vscale x 4 x i16> %a to <vscale x 4 x i32> 124 %b = load volatile <vscale x 4 x i16>, <vscale x 4 x i16>* %local1 125 %b_ext = sext <vscale x 4 x i16> %b to <vscale x 4 x i32> 126 %sum = add <vscale x 4 x i32> %a_ext, %b_ext 127 ret <vscale x 4 x i32> %sum 128} 129 130define void @fill_nxv2i16() { 131; CHECK-LABEL: fill_nxv2i16 132; CHECK-DAG: ld1h { z{{[01]}}.d }, p0/z, [sp, #3, mul vl] 133; CHECK-DAG: ld1h { z{{[01]}}.d }, p0/z, [sp, #2, mul vl] 134 %local0 = alloca <vscale x 2 x i16> 135 %local1 = alloca <vscale x 2 x i16> 136 load volatile <vscale x 2 x i16>, <vscale x 2 x i16>* %local0 137 load volatile <vscale x 2 x i16>, <vscale x 2 x i16>* %local1 138 ret void 139} 140 141define <vscale x 2 x i64> @fill_signed_nxv2i16() { 142; CHECK-LABEL: fill_signed_nxv2i16 143; CHECK-DAG: ld1sh { z{{[01]}}.d }, p0/z, [sp, #3, mul vl] 144; CHECK-DAG: ld1sh { z{{[01]}}.d }, p0/z, [sp, #2, mul vl] 145 %local0 = alloca <vscale x 2 x i16> 146 %local1 = alloca <vscale x 2 x i16> 147 %a = load volatile <vscale x 2 x i16>, <vscale x 2 x i16>* %local0 148 %a_ext = sext <vscale x 2 x i16> %a to <vscale x 2 x i64> 149 %b = load volatile <vscale x 2 x i16>, <vscale x 2 x i16>* %local1 150 %b_ext = sext <vscale x 2 x i16> %b to <vscale x 2 x i64> 151 %sum = add <vscale x 2 x i64> %a_ext, %b_ext 152 ret <vscale x 2 x i64> %sum 153} 154 155define void @fill_nxv4i32() { 156; CHECK-LABEL: fill_nxv4i32 157; CHECK-DAG: ld1w { z{{[01]}}.s }, p0/z, [sp] 158; CHECK-DAG: ld1w { z{{[01]}}.s }, p0/z, [sp, #1, mul vl] 159 %local0 = alloca <vscale x 4 x i32> 160 %local1 = alloca <vscale x 4 x i32> 161 load volatile <vscale x 4 x i32>, <vscale x 4 x i32>* %local0 162 load volatile <vscale x 4 x i32>, <vscale x 4 x i32>* %local1 163 ret void 164} 165 166define void @fill_nxv2i32() { 167; CHECK-LABEL: fill_nxv2i32 168; CHECK-DAG: ld1w { z{{[01]}}.d }, p0/z, [sp] 169; CHECK-DAG: ld1w { z{{[01]}}.d }, p0/z, [sp, #1, mul vl] 170 %local0 = alloca <vscale x 2 x i32> 171 %local1 = alloca <vscale x 2 x i32> 172 load volatile <vscale x 2 x i32>, <vscale x 2 x i32>* %local0 173 load volatile <vscale x 2 x i32>, <vscale x 2 x i32>* %local1 174 ret void 175} 176 177define <vscale x 2 x i64> @fill_signed_nxv2i32() { 178; CHECK-LABEL: fill_signed_nxv2i32 179; CHECK-DAG: ld1sw { z{{[01]}}.d }, p0/z, [sp] 180; CHECK-DAG: ld1sw { z{{[01]}}.d }, p0/z, [sp, #1, mul vl] 181 %local0 = alloca <vscale x 2 x i32> 182 %local1 = alloca <vscale x 2 x i32> 183 %a = load volatile <vscale x 2 x i32>, <vscale x 2 x i32>* %local0 184 %a_ext = sext <vscale x 2 x i32> %a to <vscale x 2 x i64> 185 %b = load volatile <vscale x 2 x i32>, <vscale x 2 x i32>* %local1 186 %b_ext = sext <vscale x 2 x i32> %b to <vscale x 2 x i64> 187 %sum = add <vscale x 2 x i64> %a_ext, %b_ext 188 ret <vscale x 2 x i64> %sum 189} 190 191define void @fill_nxv2i64() { 192; CHECK-LABEL: fill_nxv2i64 193; CHECK-DAG: ld1d { z{{[01]}}.d }, p0/z, [sp] 194; CHECK-DAG: ld1d { z{{[01]}}.d }, p0/z, [sp, #1, mul vl] 195 %local0 = alloca <vscale x 2 x i64> 196 %local1 = alloca <vscale x 2 x i64> 197 load volatile <vscale x 2 x i64>, <vscale x 2 x i64>* %local0 198 load volatile <vscale x 2 x i64>, <vscale x 2 x i64>* %local1 199 ret void 200} 201 202define void @fill_nxv8bf16() { 203; CHECK-LABEL: fill_nxv8bf16 204; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp] 205; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp, #1, mul vl] 206 %local0 = alloca <vscale x 8 x bfloat> 207 %local1 = alloca <vscale x 8 x bfloat> 208 load volatile <vscale x 8 x bfloat>, <vscale x 8 x bfloat>* %local0 209 load volatile <vscale x 8 x bfloat>, <vscale x 8 x bfloat>* %local1 210 ret void 211} 212 213define void @fill_nxv8f16() { 214; CHECK-LABEL: fill_nxv8f16 215; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp] 216; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp, #1, mul vl] 217 %local0 = alloca <vscale x 8 x half> 218 %local1 = alloca <vscale x 8 x half> 219 load volatile <vscale x 8 x half>, <vscale x 8 x half>* %local0 220 load volatile <vscale x 8 x half>, <vscale x 8 x half>* %local1 221 ret void 222} 223 224define void @fill_nxv4f32() { 225; CHECK-LABEL: fill_nxv4f32 226; CHECK-DAG: ld1w { z{{[01]}}.s }, p0/z, [sp] 227; CHECK-DAG: ld1w { z{{[01]}}.s }, p0/z, [sp, #1, mul vl] 228 %local0 = alloca <vscale x 4 x float> 229 %local1 = alloca <vscale x 4 x float> 230 load volatile <vscale x 4 x float>, <vscale x 4 x float>* %local0 231 load volatile <vscale x 4 x float>, <vscale x 4 x float>* %local1 232 ret void 233} 234 235define void @fill_nxv2f64() { 236; CHECK-LABEL: fill_nxv2f64 237; CHECK-DAG: ld1d { z{{[01]}}.d }, p0/z, [sp] 238; CHECK-DAG: ld1d { z{{[01]}}.d }, p0/z, [sp, #1, mul vl] 239 %local0 = alloca <vscale x 2 x double> 240 %local1 = alloca <vscale x 2 x double> 241 load volatile <vscale x 2 x double>, <vscale x 2 x double>* %local0 242 load volatile <vscale x 2 x double>, <vscale x 2 x double>* %local1 243 ret void 244} 245 246 247; Data spills 248 249define void @spill_nxv16i8(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1) { 250; CHECK-LABEL: spill_nxv16i8 251; CHECK-DAG: st1b { z{{[01]}}.b }, p0, [sp] 252; CHECK-DAG: st1b { z{{[01]}}.b }, p0, [sp, #1, mul vl] 253 %local0 = alloca <vscale x 16 x i8> 254 %local1 = alloca <vscale x 16 x i8> 255 store volatile <vscale x 16 x i8> %v0, <vscale x 16 x i8>* %local0 256 store volatile <vscale x 16 x i8> %v1, <vscale x 16 x i8>* %local1 257 ret void 258} 259 260define void @spill_nxv8i8(<vscale x 8 x i8> %v0, <vscale x 8 x i8> %v1) { 261; CHECK-LABEL: spill_nxv8i8 262; CHECK-DAG: st1b { z{{[01]}}.h }, p0, [sp] 263; CHECK-DAG: st1b { z{{[01]}}.h }, p0, [sp, #1, mul vl] 264 %local0 = alloca <vscale x 8 x i8> 265 %local1 = alloca <vscale x 8 x i8> 266 store volatile <vscale x 8 x i8> %v0, <vscale x 8 x i8>* %local0 267 store volatile <vscale x 8 x i8> %v1, <vscale x 8 x i8>* %local1 268 ret void 269} 270 271define void @spill_nxv4i8(<vscale x 4 x i8> %v0, <vscale x 4 x i8> %v1) { 272; CHECK-LABEL: spill_nxv4i8 273; CHECK-DAG: st1b { z{{[01]}}.s }, p0, [sp, #3, mul vl] 274; CHECK-DAG: st1b { z{{[01]}}.s }, p0, [sp, #2, mul vl] 275 %local0 = alloca <vscale x 4 x i8> 276 %local1 = alloca <vscale x 4 x i8> 277 store volatile <vscale x 4 x i8> %v0, <vscale x 4 x i8>* %local0 278 store volatile <vscale x 4 x i8> %v1, <vscale x 4 x i8>* %local1 279 ret void 280} 281 282define void @spill_nxv2i8(<vscale x 2 x i8> %v0, <vscale x 2 x i8> %v1) { 283; CHECK-LABEL: spill_nxv2i8 284; CHECK-DAG: st1b { z{{[01]}}.d }, p0, [sp, #7, mul vl] 285; CHECK-DAG: st1b { z{{[01]}}.d }, p0, [sp, #6, mul vl] 286 %local0 = alloca <vscale x 2 x i8> 287 %local1 = alloca <vscale x 2 x i8> 288 store volatile <vscale x 2 x i8> %v0, <vscale x 2 x i8>* %local0 289 store volatile <vscale x 2 x i8> %v1, <vscale x 2 x i8>* %local1 290 ret void 291} 292 293define void @spill_nxv8i16(<vscale x 8 x i16> %v0, <vscale x 8 x i16> %v1) { 294; CHECK-LABEL: spill_nxv8i16 295; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp] 296; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp, #1, mul vl] 297 %local0 = alloca <vscale x 8 x i16> 298 %local1 = alloca <vscale x 8 x i16> 299 store volatile <vscale x 8 x i16> %v0, <vscale x 8 x i16>* %local0 300 store volatile <vscale x 8 x i16> %v1, <vscale x 8 x i16>* %local1 301 ret void 302} 303 304define void @spill_nxv4i16(<vscale x 4 x i16> %v0, <vscale x 4 x i16> %v1) { 305; CHECK-LABEL: spill_nxv4i16 306; CHECK-DAG: st1h { z{{[01]}}.s }, p0, [sp] 307; CHECK-DAG: st1h { z{{[01]}}.s }, p0, [sp, #1, mul vl] 308 %local0 = alloca <vscale x 4 x i16> 309 %local1 = alloca <vscale x 4 x i16> 310 store volatile <vscale x 4 x i16> %v0, <vscale x 4 x i16>* %local0 311 store volatile <vscale x 4 x i16> %v1, <vscale x 4 x i16>* %local1 312 ret void 313} 314 315define void @spill_nxv2i16(<vscale x 2 x i16> %v0, <vscale x 2 x i16> %v1) { 316; CHECK-LABEL: spill_nxv2i16 317; CHECK-DAG: st1h { z{{[01]}}.d }, p0, [sp, #3, mul vl] 318; CHECK-DAG: st1h { z{{[01]}}.d }, p0, [sp, #2, mul vl] 319 %local0 = alloca <vscale x 2 x i16> 320 %local1 = alloca <vscale x 2 x i16> 321 store volatile <vscale x 2 x i16> %v0, <vscale x 2 x i16>* %local0 322 store volatile <vscale x 2 x i16> %v1, <vscale x 2 x i16>* %local1 323 ret void 324} 325 326define void @spill_nxv4i32(<vscale x 4 x i32> %v0, <vscale x 4 x i32> %v1) { 327; CHECK-LABEL: spill_nxv4i32 328; CHECK-DAG: st1w { z{{[01]}}.s }, p0, [sp] 329; CHECK-DAG: st1w { z{{[01]}}.s }, p0, [sp, #1, mul vl] 330 %local0 = alloca <vscale x 4 x i32> 331 %local1 = alloca <vscale x 4 x i32> 332 store volatile <vscale x 4 x i32> %v0, <vscale x 4 x i32>* %local0 333 store volatile <vscale x 4 x i32> %v1, <vscale x 4 x i32>* %local1 334 ret void 335} 336 337define void @spill_nxv2i32(<vscale x 2 x i32> %v0, <vscale x 2 x i32> %v1) { 338; CHECK-LABEL: spill_nxv2i32 339; CHECK-DAG: st1w { z{{[01]}}.d }, p0, [sp] 340; CHECK-DAG: st1w { z{{[01]}}.d }, p0, [sp, #1, mul vl] 341 %local0 = alloca <vscale x 2 x i32> 342 %local1 = alloca <vscale x 2 x i32> 343 store volatile <vscale x 2 x i32> %v0, <vscale x 2 x i32>* %local0 344 store volatile <vscale x 2 x i32> %v1, <vscale x 2 x i32>* %local1 345 ret void 346} 347 348define void @spill_nxv2i64(<vscale x 2 x i64> %v0, <vscale x 2 x i64> %v1) { 349; CHECK-LABEL: spill_nxv2i64 350; CHECK-DAG: st1d { z{{[01]}}.d }, p0, [sp] 351; CHECK-DAG: st1d { z{{[01]}}.d }, p0, [sp, #1, mul vl] 352 %local0 = alloca <vscale x 2 x i64> 353 %local1 = alloca <vscale x 2 x i64> 354 store volatile <vscale x 2 x i64> %v0, <vscale x 2 x i64>* %local0 355 store volatile <vscale x 2 x i64> %v1, <vscale x 2 x i64>* %local1 356 ret void 357} 358 359define void @spill_nxv8f16(<vscale x 8 x half> %v0, <vscale x 8 x half> %v1) { 360; CHECK-LABEL: spill_nxv8f16 361; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp] 362; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp, #1, mul vl] 363 %local0 = alloca <vscale x 8 x half> 364 %local1 = alloca <vscale x 8 x half> 365 store volatile <vscale x 8 x half> %v0, <vscale x 8 x half>* %local0 366 store volatile <vscale x 8 x half> %v1, <vscale x 8 x half>* %local1 367 ret void 368} 369 370define void @spill_nxv8bf16(<vscale x 8 x bfloat> %v0, <vscale x 8 x bfloat> %v1) { 371; CHECK-LABEL: spill_nxv8bf16 372; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp] 373; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp, #1, mul vl] 374 %local0 = alloca <vscale x 8 x bfloat> 375 %local1 = alloca <vscale x 8 x bfloat> 376 store volatile <vscale x 8 x bfloat> %v0, <vscale x 8 x bfloat>* %local0 377 store volatile <vscale x 8 x bfloat> %v1, <vscale x 8 x bfloat>* %local1 378 ret void 379} 380 381define void @spill_nxv4f32(<vscale x 4 x float> %v0, <vscale x 4 x float> %v1) { 382; CHECK-LABEL: spill_nxv4f32 383; CHECK-DAG: st1w { z{{[01]}}.s }, p0, [sp] 384; CHECK-DAG: st1w { z{{[01]}}.s }, p0, [sp, #1, mul vl] 385 %local0 = alloca <vscale x 4 x float> 386 %local1 = alloca <vscale x 4 x float> 387 store volatile <vscale x 4 x float> %v0, <vscale x 4 x float>* %local0 388 store volatile <vscale x 4 x float> %v1, <vscale x 4 x float>* %local1 389 ret void 390} 391 392define void @spill_nxv2f64(<vscale x 2 x double> %v0, <vscale x 2 x double> %v1) { 393; CHECK-LABEL: spill_nxv2f64 394; CHECK-DAG: st1d { z{{[01]}}.d }, p0, [sp] 395; CHECK-DAG: st1d { z{{[01]}}.d }, p0, [sp, #1, mul vl] 396 %local0 = alloca <vscale x 2 x double> 397 %local1 = alloca <vscale x 2 x double> 398 store volatile <vscale x 2 x double> %v0, <vscale x 2 x double>* %local0 399 store volatile <vscale x 2 x double> %v1, <vscale x 2 x double>* %local1 400 ret void 401} 402 403; Predicate fills 404 405define void @fill_nxv16i1() { 406; CHECK-LABEL: fill_nxv16i1 407; CHECK-DAG: ldr p{{[01]}}, [sp, #8, mul vl] 408; CHECK-DAG: ldr p{{[01]}}, [sp] 409 %local0 = alloca <vscale x 16 x i1> 410 %local1 = alloca <vscale x 16 x i1> 411 load volatile <vscale x 16 x i1>, <vscale x 16 x i1>* %local0 412 load volatile <vscale x 16 x i1>, <vscale x 16 x i1>* %local1 413 ret void 414} 415 416define void @fill_nxv8i1() { 417; CHECK-LABEL: fill_nxv8i1 418; CHECK-DAG: ldr p{{[01]}}, [sp, #4, mul vl] 419; CHECK-DAG: ldr p{{[01]}}, [sp] 420 %local0 = alloca <vscale x 8 x i1> 421 %local1 = alloca <vscale x 8 x i1> 422 load volatile <vscale x 8 x i1>, <vscale x 8 x i1>* %local0 423 load volatile <vscale x 8 x i1>, <vscale x 8 x i1>* %local1 424 ret void 425} 426 427define void @fill_nxv4i1() { 428; CHECK-LABEL: fill_nxv4i1 429; CHECK-DAG: ldr p{{[01]}}, [sp, #6, mul vl] 430; CHECK-DAG: ldr p{{[01]}}, [sp, #4, mul vl] 431 %local0 = alloca <vscale x 4 x i1> 432 %local1 = alloca <vscale x 4 x i1> 433 load volatile <vscale x 4 x i1>, <vscale x 4 x i1>* %local0 434 load volatile <vscale x 4 x i1>, <vscale x 4 x i1>* %local1 435 ret void 436} 437 438define void @fill_nxv2i1() { 439; CHECK-LABEL: fill_nxv2i1 440; CHECK-DAG: ldr p{{[01]}}, [sp, #7, mul vl] 441; CHECK-DAG: ldr p{{[01]}}, [sp, #6, mul vl] 442 %local0 = alloca <vscale x 2 x i1> 443 %local1 = alloca <vscale x 2 x i1> 444 load volatile <vscale x 2 x i1>, <vscale x 2 x i1>* %local0 445 load volatile <vscale x 2 x i1>, <vscale x 2 x i1>* %local1 446 ret void 447} 448 449; Predicate spills 450 451define void @spill_nxv16i1(<vscale x 16 x i1> %v0, <vscale x 16 x i1> %v1) { 452; CHECK-LABEL: spill_nxv16i1 453; CHECK-DAG: str p{{[01]}}, [sp, #8, mul vl] 454; CHECK-DAG: str p{{[01]}}, [sp] 455 %local0 = alloca <vscale x 16 x i1> 456 %local1 = alloca <vscale x 16 x i1> 457 store volatile <vscale x 16 x i1> %v0, <vscale x 16 x i1>* %local0 458 store volatile <vscale x 16 x i1> %v1, <vscale x 16 x i1>* %local1 459 ret void 460} 461 462define void @spill_nxv8i1(<vscale x 8 x i1> %v0, <vscale x 8 x i1> %v1) { 463; CHECK-LABEL: spill_nxv8i1 464; CHECK-DAG: str p{{[01]}}, [sp, #4, mul vl] 465; CHECK-DAG: str p{{[01]}}, [sp] 466 %local0 = alloca <vscale x 8 x i1> 467 %local1 = alloca <vscale x 8 x i1> 468 store volatile <vscale x 8 x i1> %v0, <vscale x 8 x i1>* %local0 469 store volatile <vscale x 8 x i1> %v1, <vscale x 8 x i1>* %local1 470 ret void 471} 472 473define void @spill_nxv4i1(<vscale x 4 x i1> %v0, <vscale x 4 x i1> %v1) { 474; CHECK-LABEL: spill_nxv4i1 475; CHECK-DAG: str p{{[01]}}, [sp, #6, mul vl] 476; CHECK-DAG: str p{{[01]}}, [sp, #4, mul vl] 477 %local0 = alloca <vscale x 4 x i1> 478 %local1 = alloca <vscale x 4 x i1> 479 store volatile <vscale x 4 x i1> %v0, <vscale x 4 x i1>* %local0 480 store volatile <vscale x 4 x i1> %v1, <vscale x 4 x i1>* %local1 481 ret void 482} 483 484define void @spill_nxv2i1(<vscale x 2 x i1> %v0, <vscale x 2 x i1> %v1) { 485; CHECK-LABEL: spill_nxv2i1 486; CHECK-DAG: str p{{[01]}}, [sp, #7, mul vl] 487; CHECK-DAG: str p{{[01]}}, [sp, #6, mul vl] 488 %local0 = alloca <vscale x 2 x i1> 489 %local1 = alloca <vscale x 2 x i1> 490 store volatile <vscale x 2 x i1> %v0, <vscale x 2 x i1>* %local0 491 store volatile <vscale x 2 x i1> %v1, <vscale x 2 x i1>* %local1 492 ret void 493} 494