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1# RUN: llc -mtriple=aarch64-linux-gnu -run-pass=greedy %s -o - | FileCheck %s
2# RUN: llc -mtriple=aarch64-linux-gnu -start-before=greedy -stop-after=aarch64-expand-pseudo %s -o - | FileCheck %s --check-prefix=EXPAND
3--- |
4  ; ModuleID = '<stdin>'
5  source_filename = "<stdin>"
6  target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
7  target triple = "aarch64--linux-gnu"
8
9  define aarch64_sve_vector_pcs void @spills_fills_stack_id_ppr() #0 { entry: unreachable }
10  define aarch64_sve_vector_pcs void @spills_fills_stack_id_zpr() #0 { entry: unreachable }
11  define aarch64_sve_vector_pcs void @spills_fills_stack_id_zpr2() #0 { entry: unreachable }
12  define aarch64_sve_vector_pcs void @spills_fills_stack_id_zpr3() #0 { entry: unreachable }
13  define aarch64_sve_vector_pcs void @spills_fills_stack_id_zpr4() #0 { entry: unreachable }
14
15  attributes #0 = { nounwind "target-features"="+sve" }
16
17...
18---
19name: spills_fills_stack_id_ppr
20tracksRegLiveness: true
21registers:
22  - { id: 0, class: ppr }
23stack:
24liveins:
25  - { reg: '$p0', virtual-reg: '%0' }
26body:             |
27  bb.0.entry:
28    liveins: $p0
29
30    ; CHECK-LABEL: name: spills_fills_stack_id_ppr
31    ; CHECK: stack:
32    ; CHECK:      - { id: 0, name: '', type: spill-slot, offset: 0, size: 2, alignment: 2
33    ; CHECK-NEXT:     stack-id: sve-vec, callee-saved-register: ''
34
35    ; EXPAND-LABEL: name: spills_fills_stack_id_ppr
36    ; EXPAND: STR_PXI $p0, $sp, 7
37    ; EXPAND: $p0 = LDR_PXI $sp, 7
38
39    %0:ppr = COPY $p0
40
41    $p0 = IMPLICIT_DEF
42    $p1 = IMPLICIT_DEF
43    $p2 = IMPLICIT_DEF
44    $p3 = IMPLICIT_DEF
45    $p4 = IMPLICIT_DEF
46    $p5 = IMPLICIT_DEF
47    $p6 = IMPLICIT_DEF
48    $p7 = IMPLICIT_DEF
49    $p8 = IMPLICIT_DEF
50    $p9 = IMPLICIT_DEF
51    $p10 = IMPLICIT_DEF
52    $p11 = IMPLICIT_DEF
53    $p12 = IMPLICIT_DEF
54    $p13 = IMPLICIT_DEF
55    $p14 = IMPLICIT_DEF
56    $p15 = IMPLICIT_DEF
57
58    $p0 = COPY %0
59    RET_ReallyLR
60...
61---
62name: spills_fills_stack_id_zpr
63tracksRegLiveness: true
64registers:
65  - { id: 0, class: zpr }
66stack:
67liveins:
68  - { reg: '$z0', virtual-reg: '%0' }
69body:             |
70  bb.0.entry:
71    liveins: $z0
72
73    ; CHECK-LABEL: name: spills_fills_stack_id_zpr
74    ; CHECK: stack:
75    ; CHECK:      - { id: 0, name: '', type: spill-slot, offset: 0, size: 16, alignment: 16
76    ; CHECK-NEXT:     stack-id: sve-vec, callee-saved-register: ''
77
78    ; EXPAND-LABEL: name: spills_fills_stack_id_zpr
79    ; EXPAND: STR_ZXI $z0, $sp, 0
80    ; EXPAND: $z0 = LDR_ZXI $sp, 0
81
82    %0:zpr = COPY $z0
83
84    $z0_z1_z2_z3     = IMPLICIT_DEF
85    $z4_z5_z6_z7     = IMPLICIT_DEF
86    $z8_z9_z10_z11   = IMPLICIT_DEF
87    $z12_z13_z14_z15 = IMPLICIT_DEF
88    $z16_z17_z18_z19 = IMPLICIT_DEF
89    $z20_z21_z22_z23 = IMPLICIT_DEF
90    $z24_z25_z26_z27 = IMPLICIT_DEF
91    $z28_z29_z30_z31 = IMPLICIT_DEF
92
93    $z0 = COPY %0
94    RET_ReallyLR
95...
96---
97name: spills_fills_stack_id_zpr2
98tracksRegLiveness: true
99registers:
100  - { id: 0, class: zpr2 }
101stack:
102liveins:
103  - { reg: '$z0_z1', virtual-reg: '%0' }
104body:             |
105  bb.0.entry:
106    liveins: $z0_z1
107
108    ; CHECK-LABEL: name: spills_fills_stack_id_zpr2
109    ; CHECK: stack:
110    ; CHECK:      - { id: 0, name: '', type: spill-slot, offset: 0, size: 32, alignment: 16
111    ; CHECK-NEXT:     stack-id: sve-vec
112
113    ; EXPAND-LABEL: name: spills_fills_stack_id_zpr2
114    ; EXPAND: STR_ZXI $z0, $sp, 0
115    ; EXPAND: STR_ZXI $z1, $sp, 1
116    ; EXPAND: $z0 = LDR_ZXI $sp, 0
117    ; EXPAND: $z1 = LDR_ZXI $sp, 1
118
119    %0:zpr2 = COPY $z0_z1
120
121    $z0_z1_z2_z3     = IMPLICIT_DEF
122    $z4_z5_z6_z7     = IMPLICIT_DEF
123    $z8_z9_z10_z11   = IMPLICIT_DEF
124    $z12_z13_z14_z15 = IMPLICIT_DEF
125    $z16_z17_z18_z19 = IMPLICIT_DEF
126    $z20_z21_z22_z23 = IMPLICIT_DEF
127    $z24_z25_z26_z27 = IMPLICIT_DEF
128    $z28_z29_z30_z31 = IMPLICIT_DEF
129
130    $z0_z1 = COPY %0
131    RET_ReallyLR
132...
133---
134name: spills_fills_stack_id_zpr3
135tracksRegLiveness: true
136registers:
137  - { id: 0, class: zpr3 }
138stack:
139liveins:
140  - { reg: '$z0_z1_z2', virtual-reg: '%0' }
141body:             |
142  bb.0.entry:
143    liveins: $z0_z1_z2
144
145    ; CHECK-LABEL: name: spills_fills_stack_id_zpr3
146    ; CHECK: stack:
147    ; CHECK:      - { id: 0, name: '', type: spill-slot, offset: 0, size: 48, alignment: 16
148    ; CHECK-NEXT:     stack-id: sve-vec
149
150    ; EXPAND-LABEL: name: spills_fills_stack_id_zpr3
151    ; EXPAND: STR_ZXI $z0, $sp, 0
152    ; EXPAND: STR_ZXI $z1, $sp, 1
153    ; EXPAND: STR_ZXI $z2, $sp, 2
154    ; EXPAND: $z0 = LDR_ZXI $sp, 0
155    ; EXPAND: $z1 = LDR_ZXI $sp, 1
156    ; EXPAND: $z2 = LDR_ZXI $sp, 2
157
158    %0:zpr3 = COPY $z0_z1_z2
159
160    $z0_z1_z2_z3     = IMPLICIT_DEF
161    $z4_z5_z6_z7     = IMPLICIT_DEF
162    $z8_z9_z10_z11   = IMPLICIT_DEF
163    $z12_z13_z14_z15 = IMPLICIT_DEF
164    $z16_z17_z18_z19 = IMPLICIT_DEF
165    $z20_z21_z22_z23 = IMPLICIT_DEF
166    $z24_z25_z26_z27 = IMPLICIT_DEF
167    $z28_z29_z30_z31 = IMPLICIT_DEF
168
169    $z0_z1_z2 = COPY %0
170    RET_ReallyLR
171...
172---
173name: spills_fills_stack_id_zpr4
174tracksRegLiveness: true
175registers:
176  - { id: 0, class: zpr4 }
177stack:
178liveins:
179  - { reg: '$z0_z1_z2_z3', virtual-reg: '%0' }
180body:             |
181  bb.0.entry:
182    liveins: $z0_z1_z2_z3
183
184    ; CHECK-LABEL: name: spills_fills_stack_id_zpr4
185    ; CHECK: stack:
186    ; CHECK:      - { id: 0, name: '', type: spill-slot, offset: 0, size: 64, alignment: 16
187    ; CHECK-NEXT:     stack-id: sve-vec
188
189    ; EXPAND-LABEL: name: spills_fills_stack_id_zpr4
190    ; EXPAND: STR_ZXI $z0, $sp, 0
191    ; EXPAND: STR_ZXI $z1, $sp, 1
192    ; EXPAND: STR_ZXI $z2, $sp, 2
193    ; EXPAND: STR_ZXI $z3, $sp, 3
194    ; EXPAND: $z0 = LDR_ZXI $sp, 0
195    ; EXPAND: $z1 = LDR_ZXI $sp, 1
196    ; EXPAND: $z2 = LDR_ZXI $sp, 2
197    ; EXPAND: $z3 = LDR_ZXI $sp, 3
198
199    %0:zpr4 = COPY $z0_z1_z2_z3
200
201    $z0_z1_z2_z3     = IMPLICIT_DEF
202    $z4_z5_z6_z7     = IMPLICIT_DEF
203    $z8_z9_z10_z11   = IMPLICIT_DEF
204    $z12_z13_z14_z15 = IMPLICIT_DEF
205    $z16_z17_z18_z19 = IMPLICIT_DEF
206    $z20_z21_z22_z23 = IMPLICIT_DEF
207    $z24_z25_z26_z27 = IMPLICIT_DEF
208    $z28_z29_z30_z31 = IMPLICIT_DEF
209
210    $z0_z1_z2_z3 = COPY %0
211    RET_ReallyLR
212...
213