1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s 3 4; Fold 5; ptr - (ptr & mask) 6; To 7; ptr & (~mask) 8; 9; This needs to be a backend-level fold because only by now pointers 10; are just registers; in middle-end IR this can only be done via @llvm.ptrmask() 11; intrinsic which is not sufficiently widely-spread yet. 12; 13; https://bugs.llvm.org/show_bug.cgi?id=44448 14 15; The basic positive tests 16 17define i32 @t0_32(i32 %ptr, i32 %mask) nounwind { 18; CHECK-LABEL: t0_32: 19; CHECK: // %bb.0: 20; CHECK-NEXT: bic w0, w0, w1 21; CHECK-NEXT: ret 22 %bias = and i32 %ptr, %mask 23 %r = sub i32 %ptr, %bias 24 ret i32 %r 25} 26define i64 @t1_64(i64 %ptr, i64 %mask) nounwind { 27; CHECK-LABEL: t1_64: 28; CHECK: // %bb.0: 29; CHECK-NEXT: bic x0, x0, x1 30; CHECK-NEXT: ret 31 %bias = and i64 %ptr, %mask 32 %r = sub i64 %ptr, %bias 33 ret i64 %r 34} 35 36define i32 @t2_commutative(i32 %ptr, i32 %mask) nounwind { 37; CHECK-LABEL: t2_commutative: 38; CHECK: // %bb.0: 39; CHECK-NEXT: bic w0, w0, w1 40; CHECK-NEXT: ret 41 %bias = and i32 %mask, %ptr ; swapped 42 %r = sub i32 %ptr, %bias 43 ret i32 %r 44} 45 46; Extra use tests 47 48define i32 @n3_extrause1(i32 %ptr, i32 %mask, i32* %bias_storage) nounwind { 49; CHECK-LABEL: n3_extrause1: 50; CHECK: // %bb.0: 51; CHECK-NEXT: and w8, w0, w1 52; CHECK-NEXT: sub w0, w0, w8 53; CHECK-NEXT: str w8, [x2] 54; CHECK-NEXT: ret 55 %bias = and i32 %ptr, %mask ; has extra uses, can't fold 56 store i32 %bias, i32* %bias_storage 57 %r = sub i32 %ptr, %bias 58 ret i32 %r 59} 60 61; Negative tests 62 63define i32 @n4_different_ptrs(i32 %ptr0, i32 %ptr1, i32 %mask) nounwind { 64; CHECK-LABEL: n4_different_ptrs: 65; CHECK: // %bb.0: 66; CHECK-NEXT: and w8, w1, w2 67; CHECK-NEXT: sub w0, w0, w8 68; CHECK-NEXT: ret 69 %bias = and i32 %ptr1, %mask ; not %ptr0 70 %r = sub i32 %ptr0, %bias ; not %ptr1 71 ret i32 %r 72} 73define i32 @n5_different_ptrs_commutative(i32 %ptr0, i32 %ptr1, i32 %mask) nounwind { 74; CHECK-LABEL: n5_different_ptrs_commutative: 75; CHECK: // %bb.0: 76; CHECK-NEXT: and w8, w2, w1 77; CHECK-NEXT: sub w0, w0, w8 78; CHECK-NEXT: ret 79 %bias = and i32 %mask, %ptr1 ; swapped, not %ptr0 80 %r = sub i32 %ptr0, %bias ; not %ptr1 81 ret i32 %r 82} 83 84define i32 @n6_not_lowbit_mask(i32 %ptr, i32 %mask) nounwind { 85; CHECK-LABEL: n6_not_lowbit_mask: 86; CHECK: // %bb.0: 87; CHECK-NEXT: bic w0, w0, w1 88; CHECK-NEXT: ret 89 %bias = and i32 %ptr, %mask 90 %r = sub i32 %ptr, %bias 91 ret i32 %r 92} 93 94define i32 @n7_sub_is_not_commutative(i32 %ptr, i32 %mask) nounwind { 95; CHECK-LABEL: n7_sub_is_not_commutative: 96; CHECK: // %bb.0: 97; CHECK-NEXT: and w8, w0, w1 98; CHECK-NEXT: sub w0, w8, w0 99; CHECK-NEXT: ret 100 %bias = and i32 %ptr, %mask 101 %r = sub i32 %bias, %ptr ; wrong order 102 ret i32 %r 103} 104