1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 3; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 4 5; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it. 6; WARN-NOT: warning 7 8define <vscale x 2 x i64> @sti64ldi64(<vscale x 2 x i64>* nocapture %P, <vscale x 2 x i64> %v) { 9; CHECK-LABEL: sti64ldi64: 10; CHECK: // %bb.0: // %entry 11; CHECK-NEXT: ptrue p0.d 12; CHECK-NEXT: st1d { z0.d }, p0, [x0, #1, mul vl] 13; CHECK-NEXT: ret 14entry: 15 %arrayidx0 = getelementptr inbounds <vscale x 2 x i64>, <vscale x 2 x i64>* %P, i64 1 16 store <vscale x 2 x i64> %v, <vscale x 2 x i64>* %arrayidx0 17 %arrayidx1 = getelementptr inbounds <vscale x 2 x i64>, <vscale x 2 x i64>* %P, i64 1 18 %0 = load <vscale x 2 x i64>, <vscale x 2 x i64>* %arrayidx1 19 ret <vscale x 2 x i64> %0 20} 21 22define <vscale x 2 x double> @stf64ldf64(<vscale x 2 x double>* nocapture %P, <vscale x 2 x double> %v) { 23; CHECK-LABEL: stf64ldf64: 24; CHECK: // %bb.0: // %entry 25; CHECK-NEXT: ptrue p0.d 26; CHECK-NEXT: st1d { z0.d }, p0, [x0, #1, mul vl] 27; CHECK-NEXT: ret 28entry: 29 %arrayidx0 = getelementptr inbounds <vscale x 2 x double>, <vscale x 2 x double>* %P, i64 1 30 store <vscale x 2 x double> %v, <vscale x 2 x double>* %arrayidx0 31 %arrayidx1 = getelementptr inbounds <vscale x 2 x double>, <vscale x 2 x double>* %P, i64 1 32 %0 = load <vscale x 2 x double>, <vscale x 2 x double>* %arrayidx1 33 ret <vscale x 2 x double> %0 34} 35 36define <vscale x 2 x i64> @sti32ldi32ext(<vscale x 2 x i32>* nocapture %P, <vscale x 2 x i64> %v) { 37; CHECK-LABEL: sti32ldi32ext: 38; CHECK: // %bb.0: // %entry 39; CHECK-NEXT: ptrue p0.d 40; CHECK-NEXT: sxtw z1.d, p0/m, z0.d 41; CHECK-NEXT: st1w { z0.d }, p0, [x0] 42; CHECK-NEXT: mov z0.d, z1.d 43; CHECK-NEXT: ret 44entry: 45 %0 = trunc <vscale x 2 x i64> %v to <vscale x 2 x i32> 46 store <vscale x 2 x i32> %0, <vscale x 2 x i32>* %P 47 %1 = load <vscale x 2 x i32>, <vscale x 2 x i32>* %P 48 %2 = sext <vscale x 2 x i32> %1 to <vscale x 2 x i64> 49 ret <vscale x 2 x i64> %2 50} 51 52define <2 x i64> @sti64ldfixedi64(<vscale x 2 x i64>* nocapture %P, <vscale x 2 x i64> %v) { 53; CHECK-LABEL: sti64ldfixedi64: 54; CHECK: // %bb.0: // %entry 55; CHECK-NEXT: ptrue p0.d 56; CHECK-NEXT: rdvl x8, #1 57; CHECK-NEXT: st1d { z0.d }, p0, [x0, #1, mul vl] 58; CHECK-NEXT: ldr q0, [x0, x8] 59; CHECK-NEXT: ret 60entry: 61 %arrayidx0 = getelementptr inbounds <vscale x 2 x i64>, <vscale x 2 x i64>* %P, i64 1 62 store <vscale x 2 x i64> %v, <vscale x 2 x i64>* %arrayidx0 63 %arrayidx1 = bitcast <vscale x 2 x i64>* %arrayidx0 to <2 x i64>* 64 %0 = load <2 x i64>, <2 x i64>* %arrayidx1 65 ret <2 x i64> %0 66} 67 68define <vscale x 4 x i32> @sti64ldi32(<vscale x 2 x i64>* nocapture %P, <vscale x 2 x i64> %v) { 69; CHECK-LABEL: sti64ldi32: 70; CHECK: // %bb.0: // %entry 71; CHECK-NEXT: ptrue p0.d 72; CHECK-NEXT: st1d { z0.d }, p0, [x0, #1, mul vl] 73; CHECK-NEXT: ptrue p0.s 74; CHECK-NEXT: ld1w { z0.s }, p0/z, [x0, #1, mul vl] 75; CHECK-NEXT: ret 76entry: 77 %0 = bitcast <vscale x 2 x i64>* %P to <vscale x 4 x i32>* 78 %arrayidx0 = getelementptr inbounds <vscale x 2 x i64>, <vscale x 2 x i64>* %P, i64 1 79 store <vscale x 2 x i64> %v, <vscale x 2 x i64>* %arrayidx0 80 %arrayidx1 = getelementptr inbounds <vscale x 4 x i32>, <vscale x 4 x i32>* %0, i64 1 81 %1 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %arrayidx1 82 ret <vscale x 4 x i32> %1 83} 84 85define <vscale x 2 x i64> @stf64ldi64(<vscale x 2 x double>* nocapture %P, <vscale x 2 x double> %v) { 86; CHECK-LABEL: stf64ldi64: 87; CHECK: // %bb.0: // %entry 88; CHECK-NEXT: ptrue p0.d 89; CHECK-NEXT: st1d { z0.d }, p0, [x0, #1, mul vl] 90; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, #1, mul vl] 91; CHECK-NEXT: ret 92entry: 93 %0 = bitcast <vscale x 2 x double>* %P to <vscale x 2 x i64>* 94 %arrayidx0 = getelementptr inbounds <vscale x 2 x double>, <vscale x 2 x double>* %P, i64 1 95 store <vscale x 2 x double> %v, <vscale x 2 x double>* %arrayidx0 96 %arrayidx1 = getelementptr inbounds <vscale x 2 x i64>, <vscale x 2 x i64>* %0, i64 1 97 %1 = load <vscale x 2 x i64>, <vscale x 2 x i64>* %arrayidx1 98 ret <vscale x 2 x i64> %1 99} 100