• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
2; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
3
4; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
5; WARN-NOT: warning
6
7;
8; CNTB
9;
10
11define i64 @cntb() {
12; CHECK-LABEL: cntb:
13; CHECK: cntb x0, vl2
14; CHECK-NEXT: ret
15  %out = call i64 @llvm.aarch64.sve.cntb(i32 2)
16  ret i64 %out
17}
18
19define i64 @cntb_mul3() {
20; CHECK-LABEL: cntb_mul3:
21; CHECK: cntb x0, vl6, mul #3
22; CHECK-NEXT: ret
23  %cnt = call i64 @llvm.aarch64.sve.cntb(i32 6)
24  %out = mul i64 %cnt, 3
25  ret i64 %out
26}
27
28define i64 @cntb_mul4() {
29; CHECK-LABEL: cntb_mul4:
30; CHECK: cntb x0, vl8, mul #4
31; CHECK-NEXT: ret
32  %cnt = call i64 @llvm.aarch64.sve.cntb(i32 8)
33  %out = mul i64 %cnt, 4
34  ret i64 %out
35}
36
37;
38; CNTH
39;
40
41define i64 @cnth() {
42; CHECK-LABEL: cnth:
43; CHECK: cnth x0, vl3
44; CHECK-NEXT: ret
45  %out = call i64 @llvm.aarch64.sve.cnth(i32 3)
46  ret i64 %out
47}
48
49define i64 @cnth_mul5() {
50; CHECK-LABEL: cnth_mul5:
51; CHECK: cnth x0, vl7, mul #5
52; CHECK-NEXT: ret
53  %cnt = call i64 @llvm.aarch64.sve.cnth(i32 7)
54  %out = mul i64 %cnt, 5
55  ret i64 %out
56}
57
58define i64 @cnth_mul8() {
59; CHECK-LABEL: cnth_mul8:
60; CHECK: cnth x0, vl5, mul #8
61; CHECK-NEXT: ret
62  %cnt = call i64 @llvm.aarch64.sve.cnth(i32 5)
63  %out = mul i64 %cnt, 8
64  ret i64 %out
65}
66
67;
68; CNTW
69;
70
71define i64 @cntw() {
72; CHECK-LABEL: cntw:
73; CHECK: cntw x0, vl4
74; CHECK-NEXT: ret
75  %out = call i64 @llvm.aarch64.sve.cntw(i32 4)
76  ret i64 %out
77}
78
79define i64 @cntw_mul11() {
80; CHECK-LABEL: cntw_mul11:
81; CHECK: cntw x0, vl8, mul #11
82; CHECK-NEXT: ret
83  %cnt = call i64 @llvm.aarch64.sve.cntw(i32 8)
84  %out = mul i64 %cnt, 11
85  ret i64 %out
86}
87
88define i64 @cntw_mul2() {
89; CHECK-LABEL: cntw_mul2:
90; CHECK: cntw x0, vl6, mul #2
91; CHECK-NEXT: ret
92  %cnt = call i64 @llvm.aarch64.sve.cntw(i32 6)
93  %out = mul i64 %cnt, 2
94  ret i64 %out
95}
96
97;
98; CNTD
99;
100
101define i64 @cntd() {
102; CHECK-LABEL: cntd:
103; CHECK: cntd x0, vl5
104; CHECK-NEXT: ret
105  %out = call i64 @llvm.aarch64.sve.cntd(i32 5)
106  ret i64 %out
107}
108
109define i64 @cntd_mul15() {
110; CHECK-LABEL: cntd_mul15:
111; CHECK: cntd x0, vl16, mul #15
112; CHECK-NEXT: ret
113  %cnt = call i64 @llvm.aarch64.sve.cntd(i32 9)
114  %out = mul i64 %cnt, 15
115  ret i64 %out
116}
117
118define i64 @cntd_mul16() {
119; CHECK-LABEL: cntd_mul16:
120; CHECK: cntd x0, vl32, mul #16
121; CHECK-NEXT: ret
122  %cnt = call i64 @llvm.aarch64.sve.cntd(i32 10)
123  %out = mul i64 %cnt, 16
124  ret i64 %out
125}
126
127;
128; CNTP
129;
130
131define i64 @cntp_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {
132; CHECK-LABEL: cntp_b8:
133; CHECK: cntp x0, p0, p1.b
134; CHECK-NEXT: ret
135  %out = call i64 @llvm.aarch64.sve.cntp.nxv16i1(<vscale x 16 x i1> %pg,
136                                                 <vscale x 16 x i1> %a)
137  ret i64 %out
138}
139
140define i64 @cntp_b16(<vscale x 8 x i1> %pg, <vscale x 8 x i1> %a) {
141; CHECK-LABEL: cntp_b16:
142; CHECK: cntp x0, p0, p1.h
143; CHECK-NEXT: ret
144  %out = call i64 @llvm.aarch64.sve.cntp.nxv8i1(<vscale x 8 x i1> %pg,
145                                                <vscale x 8 x i1> %a)
146  ret i64 %out
147}
148
149define i64 @cntp_b32(<vscale x 4 x i1> %pg, <vscale x 4 x i1> %a) {
150; CHECK-LABEL: cntp_b32:
151; CHECK: cntp x0, p0, p1.s
152; CHECK-NEXT: ret
153  %out = call i64 @llvm.aarch64.sve.cntp.nxv4i1(<vscale x 4 x i1> %pg,
154                                                <vscale x 4 x i1> %a)
155  ret i64 %out
156}
157
158define i64 @cntp_b64(<vscale x 2 x i1> %pg, <vscale x 2 x i1> %a) {
159; CHECK-LABEL: cntp_b64:
160; CHECK: cntp x0, p0, p1.d
161; CHECK-NEXT: ret
162  %out = call i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1> %pg,
163                                                <vscale x 2 x i1> %a)
164  ret i64 %out
165}
166
167declare i64 @llvm.aarch64.sve.cntb(i32 %pattern)
168declare i64 @llvm.aarch64.sve.cnth(i32 %pattern)
169declare i64 @llvm.aarch64.sve.cntw(i32 %pattern)
170declare i64 @llvm.aarch64.sve.cntd(i32 %pattern)
171
172declare i64 @llvm.aarch64.sve.cntp.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>)
173declare i64 @llvm.aarch64.sve.cntp.nxv8i1(<vscale x 8 x i1>, <vscale x 8 x i1>)
174declare i64 @llvm.aarch64.sve.cntp.nxv4i1(<vscale x 4 x i1>, <vscale x 4 x i1>)
175declare i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1>, <vscale x 2 x i1>)
176