1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 2; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 3 4; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it. 5; WARN-NOT: warning 6 7; 8; LD1H, LD1W, LD1D: base + 64-bit scaled offset 9; e.g. ld1h z0.d, p0/z, [x0, z0.d, lsl #1] 10; 11 12define <vscale x 2 x i64> @gld1h_index(<vscale x 2 x i1> %pg, i16* %base, <vscale x 2 x i64> %b) { 13; CHECK-LABEL: gld1h_index 14; CHECK: ld1h { z0.d }, p0/z, [x0, z0.d, lsl #1] 15; CHECK-NEXT: ret 16 %load = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1> %pg, 17 i16* %base, 18 <vscale x 2 x i64> %b) 19 %res = zext <vscale x 2 x i16> %load to <vscale x 2 x i64> 20 ret <vscale x 2 x i64> %res 21} 22 23define <vscale x 2 x i64> @gld1w_index(<vscale x 2 x i1> %pg, i32* %base, <vscale x 2 x i64> %b) { 24; CHECK-LABEL: gld1w_index 25; CHECK: ld1w { z0.d }, p0/z, [x0, z0.d, lsl #2] 26; CHECK-NEXT: ret 27 %load = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %pg, 28 i32* %base, 29 <vscale x 2 x i64> %b) 30 %res = zext <vscale x 2 x i32> %load to <vscale x 2 x i64> 31 ret <vscale x 2 x i64> %res 32} 33 34define <vscale x 2 x i64> @gld1d_index(<vscale x 2 x i1> %pg, i64* %base, <vscale x 2 x i64> %b) { 35; CHECK-LABEL: gld1d_index 36; CHECK: ld1d { z0.d }, p0/z, [x0, z0.d, lsl #3] 37; CHECK-NEXT: ret 38 %load = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.index.nxv2i64(<vscale x 2 x i1> %pg, 39 i64* %base, 40 <vscale x 2 x i64> %b) 41 ret <vscale x 2 x i64> %load 42} 43 44define <vscale x 2 x double> @gld1d_index_double(<vscale x 2 x i1> %pg, double* %base, <vscale x 2 x i64> %b) { 45; CHECK-LABEL: gld1d_index_double 46; CHECK: ld1d { z0.d }, p0/z, [x0, z0.d, lsl #3] 47; CHECK-NEXT: ret 48 %load = call <vscale x 2 x double> @llvm.aarch64.sve.ld1.gather.index.nxv2f64(<vscale x 2 x i1> %pg, 49 double* %base, 50 <vscale x 2 x i64> %b) 51 ret <vscale x 2 x double> %load 52} 53 54; 55; LD1SH, LD1SW: base + 64-bit scaled offset 56; e.g. ld1sh z0.d, p0/z, [x0, z0.d, lsl #1] 57; 58 59define <vscale x 2 x i64> @gld1sh_index(<vscale x 2 x i1> %pg, i16* %base, <vscale x 2 x i64> %b) { 60; CHECK-LABEL: gld1sh_index 61; CHECK: ld1sh { z0.d }, p0/z, [x0, z0.d, lsl #1] 62; CHECK-NEXT: ret 63 %load = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1> %pg, 64 i16* %base, 65 <vscale x 2 x i64> %b) 66 %res = sext <vscale x 2 x i16> %load to <vscale x 2 x i64> 67 ret <vscale x 2 x i64> %res 68} 69 70define <vscale x 2 x i64> @gld1sw_index(<vscale x 2 x i1> %pg, i32* %base, <vscale x 2 x i64> %b) { 71; CHECK-LABEL: gld1sw_index 72; CHECK: ld1sw { z0.d }, p0/z, [x0, z0.d, lsl #2] 73; CHECK-NEXT: ret 74 %load = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %pg, 75 i32* %base, 76 <vscale x 2 x i64> %b) 77 %res = sext <vscale x 2 x i32> %load to <vscale x 2 x i64> 78 ret <vscale x 2 x i64> %res 79} 80 81declare <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1>, i16*, <vscale x 2 x i64>) 82declare <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1>, i32*, <vscale x 2 x i64>) 83declare <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.index.nxv2i64(<vscale x 2 x i1>, i64*, <vscale x 2 x i64>) 84declare <vscale x 2 x double> @llvm.aarch64.sve.ld1.gather.index.nxv2f64(<vscale x 2 x i1>, double*, <vscale x 2 x i64>) 85